Matrix inversion in FPGA

Hi all, I am working on a project which needs matrix inversion (dense matrix) of order 40x40 with floating point numbers. I am in need of help in doing the same with systolic array architecture in an efficient manner. I am trying this in Verilog. It will be very helpful for me if anybody can give me an explaination for the architecture or a sample verilog code for implementing matrix inverse in systolic arrays.

Thanks and regards, Siva

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