How many logic cells are there in one slice

Do you have a question? Post it now! No Registration Necessary

Translate This Thread From English to

Threaded View
hi all,
   i wud like to know how many logic cells are there in 1 slice. 1
slice contains 2 LUTs. OK to tell in particular i am using an XC2V3000
with 14336 slices. So how many logic cells does it amount to? thanx


Re: How many logic cells are there in one slice

Quoted text here. Click to load it
XC2V3000

Step 1: go to http://www.google.com
Step 2: type in the following three words: logic cell slice
Step 3: click on the 4th result

   Marc


Re: How many logic cells are there in one slice
Quoted text here. Click to load it

The 4th result of google will change frequently...

I think the OP is confused by the fact the Xilinx count a slice as 2.25 LCs
due to "extra features".

A hint for Xilinx marketing: They could also increase the I/O-count by 7.8%
due to extra features ;-)

Seriously: I think Altera has more sophisticated counter and
register-packing, so this 2.25-factor is very misleading. Things look
different when we are talking about Stratix II - ALMs, where I would not
really back up Altera's +25%-claim, too (at least what I see from a larger
test-design, originally targeted to Cyclone).

Thomas

www.entner-electronics.com



Re: How many logic cells are there in one slice

[...]
Quoted text here. Click to load it
by 7.8%
Quoted text here. Click to load it

Indeed.  In fact, I can't help but think it's more than just 7.8%!  The
mind boggles just thinking of all the ways their marketing department
could find justification for saying that a 456 pin device has
"effectively 2000 pins".

Quoted text here. Click to load it

not
larger

Agreed.  Inflating their (Xilinx or Altera) numbers by 25% implies to
me that, I should find the "extra features" being used in one out of
four logic cells, on average.  Instead, I find that on a 20000 LUT
design, 2000 MUXFx's are used.  So for this design, it's really 10% -
and that was coding by our ASIC guys, who tend to not pipeline as much
as they could/should.  On our other designs, it is noticably below 10%.

Have fun,

   Marc


Re: How many logic cells are there in one slice
Hi Thomas,

Quoted text here. Click to load it

The 2.5 Stratix LEs to Stratix II ALM ratio is an average over a large suite
of (real) designs.  That said, there *is* a spread to the LE to ALM ratio.
An (artificial) design that maps perfectly into 4-LUTs will get a ~2:1
ratio.  An (artificial) design comprising all random 6-LUTs will get a ~4:1
ratio.  Real designs will land somewhere in between as they will use a
variety of various LUT types.  Also, the amount of arithmetic circuitry and
# of FFs in the design can impact the packing ratio.

From an intuitive perspective, just look at the ALM and you can see that
there is a lot more goo there than just what would be needed for 2 LEs.
That extra circuitry isn't free -- we would not have spent that silicon area
on it without getting more logic density back.  Otherwise we would have just
removed the circuitry and instead fit more LEs in the chip!

Regards,

Paul Leventis
Altera Corp.



Re: How many logic cells are there in one slice
Quoted text here. Click to load it

Depends on your exact definition of a logic cell.

If a logic cell is "one 4-LUT and one FF", then a slice (a xilinx term)
contains 2 of them. The slice contains other stuff that is not part of
the above definition of a logic cell, and the logic cell (LUT+FF) can
do stuff beyond the minimum of what you would expect a "4-LUT + FF" can
do (such as SP RAM, DP RAM, SRL16, carry).

According to http://www.fpga-faq.org/compare/build_form.cgi
the XC2V3000 has:

28672 4-LUTS
28672 FFs (in the slices. there are 720 I/Os that also have FFs)

A slice contains the following:
Slice (2 x (FF+Carry+XOR+AND+LUT4(as Logic/ROM/RAM/Shifter) )

Philip



===================
Philip Freidin
philip.freidin@fpga-faq.org
Host for WWW.FPGA-FAQ.ORG

Site Timeline