2)But each logic cell need some SRAM configuration bits from configuration register
The question I have is if I don't want configuration bits and wires jamming up the routing channel for the logic array, can I have them on different metal layers?
I want to have simplest. 2 layers of metal. Metal 1 for logic arrays and routing channels and Metal 2 for SRAM configuration bits and wirings.
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Are you asking about designing your own FPGA? If so, you can do anything you want with that.
I don't think you can divide up the signals in that way. Any set of connections will require routing in both the X and the Y direction. It is often best to use two layers, one for X and one for Y. Otherwise you find a set of signals routing in one direction block routing in the other direction. So if you want to partition your routing layers into two classes, each class will need two layers for a total of four layers of metal.
-- Rick
(snip on configuration registers in FPGAs)
I haven't thought about it this much since the XC4000 days, but as far as I know there are configuration bit shift registers along rows (or columns) and a column (or row) on one side that steers bits as appropriate.
Note also that configuration runs much slower than the actual logic, so the transistors are different, and routing can be different.
For logic, one tries to keep signals in metal, instead of silicon, as its lower resistivity means it runs faster. That isn't so important for configuration.
It might be that you can share with wiring that has a different use after configuration. If so, there is probably a patent, though it might have expired.
Note also that the LUTs in some FPGAs can also be used as shift registers, and also need to be part of the configuration data. Maybe they use the same shift logic in both cases.
I am sure by now there is much art on the optimal designs for FPGAs, which should be well documented somewhere. Patents are a convenient place to look.
-- glen
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