BlackFin BF531 and MT48LC4M16

I haven't use BF531 with this particular SDRAM; however 1M x 16 x 4 is standard configuration and there should be no problem. Bank size field in SDRAM controller only controls the allowed address range for access.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Hello Vladimir,

thank you for your answer. I'm still not sure if the SDRAM controler inside the BF531 can do it, so I've wrote an e-mail do AD technical support - I will see if I will get an answer and what it will be :)

Best regards, Jookie

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The answer is: RTFM Namely EN-210

VLV

Jookie wrote:

Vladimir Vassilevsky wrote in news:l7ednQaiHK9LayjWnZ2dnUVZ snipped-for-privacy@giganews.com:

Blackfin.org is quiet but there is very active support for Blackfin on the ADI site.

Al Clark

Vladimir,

I've checked the FM, and it made me go through the datasheet of MT48LC4M16 again. I've found that the page size of that SDRAM is 256 B and the BF531 supports page size 512 B or more, so that might be one of those problems I have (anyway, I got some data from that working). So now I'll wait for the final word from Analog and see if they got any recommendations.

Jookie

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Then you are out of luck.

VLV

Well, not realy, I just need to replace it with a different one. I've took a look and the MT48LC16M16 (32 MB) is pin compatible with my MT48LC4M16 (8 MB), it has just one more address pin connected (will connect that missing pin with wire), so it will be no bit deal :)

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"Jookie" wrote in news:dIGdneTct- lLeSXWnZ2dnUVZ snipped-for-privacy@giganews.com:

We use the MT48LC4M16A2P-7E IT:G with a BF532. I would lay iy out for the larger part. This gives you a universal footprint.

Al Clark

Al, do you got it working all ok? Because I have the feeling from the manuals that there might be some issues with it.

My SDRAM setup looks like this:

*pEBIU_SDRRC = 0x00000816; *pEBIU_SDBCTL = 0x00000001; *pEBIU_SDGCTL = 0x00911149;

Jookie

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"Jookie" wrote in news:iN2dnadYtLJAqybWnZ2dnUVZ snipped-for-privacy@giganews.com:

Our settings for BF 532 with SCLK = 132MHz

*pEBIU_AMBCTL1 = 0xFFFEFFFE; *pEBIU_AMBCTL0 = 0xFFFEFFC0; *pEBIU_AMGCTL = 0x00F3; *pEBIU_SDGCTL = 0x819199CD; *pEBIU_SDBCTL = 0x0005; //0x0013 for 256 Mb 0x0005 for 64 Mb *pEBIU_SDRRC = 0x008C3;

Al Clark

Thank you Al,

I got it working with your help and with the help of ADI e-mail support - the memory is mapped to 4 regions per 2 MB now:

- 0x000000 - 0x1fffff

- 0x400000 - 0x5fffff

- 0x800000 - 0x9fffff

- 0xC00000 - 0xdfffff

Best regards, Jookie

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