Why Pentium II so special in 32-bit mode, it's said a lot of function lost.

Why Pentium II so special on 32 bit code?

I think that was also true of an earlier Intel "686" CPU known as the "Pentium Pro".

Pentium III is also a 686. As in work done per clock cycle, it maybe along with later Pentium II's (most 600-plus MHz) improved a bit upon

600-minus MHz PII by having full-speed L2 cache.

P4 did less per clock cycle than P2-P3 to an extent that I heard a bit of some supposed possible reintroduction of P3 at speeds around or a little over 1 GHZ since that would outperform the slowest slightly higher speeds of P4 in the early days of P4.

Now another thing of P2-plus for 32 bit code: P2 was supposed to be good for 32 bit code, and I believe this was at the expense of goodness with 16 bit code. I had a "speed test personal benchmark" (an executable produced by Microsoft's "Quick Basic" 4.5) run less than 1% faster on a

266 MHz P2 than on a 133 MHZ P1. P1 is a 586 and Intel apparently had "P1"/"586" do really well with older software, better than anything before or after. AMD appears to me to do better than Intel for "later-than-586" processors to do more work per clock cycle, especially with pre-32-bit older software.

- Don Klipstein ( snipped-for-privacy@misty.com)

The "Pentium Pro" sucked at 16-bit code because it designed specifically for 32bit code. It was intended for servers, not desktops. The segment registers were there to support "legacy" 16b code but there was no effort expended to make them efficient. Segment register reloads were painful. The PII fixed this problem by caching (or renaming, can't remember which) the segment registers.

The PII was a cost-reduction of the PPro (and included the segment register fix above). The PPRo's dual cavity ceramic package (processor and cache chips) was expensive. In addition, Intel was giving the cache chip away "free". They had to make it, but the price of the PPro was fixed by what the processor could do. The cache chip was also about the same size as the processor. The PII replaced the expensive ceramic package with a cheap piece of FR4 and moved to a "slot" rather than a socket and cheaper "industry" SRAM for the cache.

The PIII is really a marketing gimmic. There really isn't much difference between a PII and PIII other than clock speed and such. The move back to the integrated (full speed) cache and socket was later.

Yes, the P4 was intended specificly for video applications. Intel thought everyone would be doing video editing at home. Maybe I should have said "hoped". ;-) Intel "forgot" the integer multiplier (the FP multiplier was used, tieing up both units and added two cross chip transfers) and barrel shifter, so it sucked at integer applications. Its FPU and vector units more than made up for this on "video" sorts of applications.

The PII had most of the PPro's segment register cruft fixed by caching the registers, but that only helped so much. Once the cache thrashes... The PII's cache was far superrior to the P5x though. Your benchmark may have tripped over the segment register problem, but was small enough to fit in the P5's cache.

Other than FPU intensive stuff they kicked Intel's butt on "586" stuff too. The K6 and later K6-III were right in there with the PIIs of the same era. Intel held the advantage with the FPU pipelining and AMD with the FX (and elegant micro-architecture, IMO).

--
  Keith