Tips on routing this high density/high current board? I'm stuck - any ideas?

I am building a display consisting of a series of seven 5x7 LED dot matrix displays, butted up against one another. The displays are of the 0.7" variety (about as small as they come). I will be driving them with PWM to control brightness, using shift registers to control the 35 horizontal elements, and switching the 7 rows sequentially to paint the display. The pulse current on each dot is 100ma, and times 35 horizontal dots, that's a potential max of 3.5A.

Problem is, I am trying to keep the board small. The traces required to handle 3.5A are pretty fat - too fat to allow the close spacing I need for the project.

Anyone have any tips?

Some ideas....

I could mount the through-hole displays in DIP to SMT adapters and surface mount them, freeing up the back of the board to route my traces. Downside is cost and increased complexity, and the board would be thicker

I can seperate out the segments into 2, 2 and 3 and they'd be 1A, 1A,

1.5A, which I can fit the traces. However now I am faced with routing three fat traces to each of my power transistors that switch the rows, and I'd definitely have to increase the board size to accomodate

I can use a 4-layer board... probably the most suitable solution, but more expensive

I am already putting all my shift registers and microcontroller on a sub-board, so I've trimmed the components on the display to the bare minimum.

Any other ideas? Routing this board is driving me nuts!

Thanks!

Corp.

Reply to
ferrari.secret.santa
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Yes.

Use the right size track !

What's the duty cycle on the segements ?

Each track needs to be sized for Ipulse * duty cycle.

If you need > 10 thou ( mil ) I'd be surprised.

Graham

Reply to
Eeyore

Eeyore a écrit :

What matters is average power, so make that Ipulse * sqrt(duty cycle).

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Thanks,
Fred.
Reply to
Fred Bartoli

Silly me. You're quite right.

Graham

Reply to
Eeyore

Duty cycle is 1/10th for each row

Reply to
ferrari.secret.santa

I feel dumb :)

In my years of doing PCB design/layout (granted, as an amateur) I was not aware that you could use the average power to determine trace width. This makes everything MUCH easier.

Boy that saved me a lot of aggravation. Thanks gents!

Reply to
ferrari.secret.santa

Why? Assuming it's a square wave, won't it be either full power or no power?

Reply to
DJ Delorie

DJ Delorie a écrit :

writes:

Well, in fact it depends on the time scale.

If your frequency is high enough (WRT PCB thermal inertia) then it's average power that matters and you use Ipk*sqrt(duty cycle).

If your frequency is low enough (WRT PCB thermal inertia) then it's peak power that matters and you use Ipk.

If your frequency is on par with PCB thermal inertia then it's up to you to be clever :-)

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Thanks,
Fred.
Reply to
Fred Bartoli

writes:

No it isn't.

For a square ware with given peak current losses are directly proportional to the duty cycle.

Pav = R * Ipk^2 * dt

For a square wave with given average current losses are proportional to the reciprocal of the duty cycle.

Pav = R * Iav^2 / dt

Reply to
nospam

nospam a écrit :

writes:

Uhh? Power is linked to Irms.

So Irms, which gives the average power is Ipk*sqrt(duty), which is exactly what I wrote.

Which is exactly the same thing, written differently.

So?

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Thanks,
Fred.
Reply to
Fred Bartoli

Consider a 2A feed at 50% duty cycle. Imax = 2

Square Imax = 4

At a 50% duty cycle, the mean is 2.

Sqrt(2) = 1.414

Ok, the math makes sense, but *why* is power linked to Irms and not Iavg ?

Reply to
DJ Delorie

1A peak, 1 ohm, 50% dt

Pav = 1 * 1^2 * 0.5 = 0.5

Pav = 1 * sqrt(0.5) = 0.707

which is right?

Reply to
nospam

nospam a écrit :

No. Where did you see that Pav = R*Irms ?

Pav is R * Irms^2 thus Pav = 1 * sqrt(0.5)^2 = 0.5

QED.

Me, I guess :-)

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Thanks,
Fred.
Reply to
Fred Bartoli

integrate I*I*R

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Bye.
   Jasen
Reply to
jasen

ha ? Wouldn't he be running at a duty cycle of 1/7 = 14.2% (ignoring any display blanking time) thereby giving RMS current through the common pin on each display, at

sqrt(1/7)*5*7*100mA = 1.32A ?

Reply to
Adam S

There are two things you have to take into account with low-frequency, high current lines. One is DC resistive voltage drop, and the other is heating. For the first issue, peak currents are the main thing to look at. Depending on the application, you might be able to improve on that by putting your drivers closer to where they are needed, and/or using capacitors to store charge locally (i.e., think of you system as a series of unregulated switch mode power supplies). Other than that, the tracks should be as thick and straight as possible, with multiple tracks on different layers.

For the heat issue, it's the average current that is most important. There are also plenty of tricks that can be used to improve heat dissipation - splitting the track in two and running each half on a different board layer (especially the outer layers), using polygon pours where there is space, adding extra tracks that don't carry current anywhere but act as cooling fins, and no solder mask so that the tracks get a layer of solder when you produce the card (solder is not nearly as good a heat conductor as the copper, even with a thin track, but will give you better air cooling).

Reply to
David Brown

Perhaps use bus bars. Strips of plated copper with legs. They stand vertically and can be bent to go around corners.

Reply to
CWatters

Or more layers, or specify heavier (thicker) copper -35u is standard, but you can get 70u and 105u Also, consider to what extent the voltage drop actually matters - the power is going to turn into heat somewhere - displays, resistors, drivers, and you may be able to live with a bit burning off in the PCB tracks.

Reply to
Mike Harrison

The other trick you can use is multiple small tracks instead of one big track- the current will distribute evenly.

I've also seen boards where the tracks have been overplated with tin or gold after etching to increase the track thickness and decrease resistance.

-A

can get 70u and 105u

going to turn into

with a bit burning off in

Reply to
conundrum

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