1. Home
  2. Field-Programmable Gate Arrays
  3. Xilinx S3 IO during programming latches Cypress FX2 Reset

Xilinx S3 IO during programming latches Cypress FX2 Reset

Got a strange problem here. When I power up, the platform PROM starts up the Spartan 3 OK and a Cypress FX2 (USB2). However when I shoot another program down through the JTAG cable, there is a slight dip in the FX2 reset pin, which I connected to a Spartan IO, from about 3.3V to 2.2V. This slight dip in voltage seems to hose the FX2 chip and its oscillator will not come back on. I thought that the IOs during the programming cycle of the Spartan 3s were high impedance and I shouldn't see such a dip.

In retrospect, I should have wired the Cypress FX2 Reset pin to an RC network like the data sheet says. But instead I wanted to be able to start the FX2 after things were stable with the Spartan 3. Another issue is why the FX2 won't recover, even if I cycle the reset pin, but that question I will direct to the Cypress folks.

Any help here would be appreciated.

Thanks in advance,

b r a d @ a i v i s i o n . c o m

Reply to
Brad Smallridge
Loading thread data ...

AFAIK, IOs are pull-down/pull-down/None during configuration based on configuration options, Mode pins and maybe hotswap-enable, default is pull-down.

pull-down in FPGA and pull-up in FX2 could explain 2.2V ....

-Lasse

Reply to
Lasse Langwadt Christensen

I tried pulling the reset pin high. But that doesn't help in configuration mode. Perhaps if the pullup was on before the configuration?

Reply to
Brad Smallridge

Brad,

The HSWAP_EN pin turns on all IO pullups prior to DONE, or leaves the IOs float.

Aust>>AFAIK, IOs are pull-down/pull-down/None during configuration based on

Reply to
Austin Lesea

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.