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Xilinx ISE & StateCad

Good morning, I've designed with statecad a state machine and tested with statebhench all seems to be OK, now I want to automatically generate the sequential circuit associated, how I could do this ?? Thanks

Antonio D'Ottavio

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etantonio
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You can only generate the HDL code from the StateCAD .. However, you can view RTL Schematic after Synthesizing your design. (add the State Machine to a project, ..etc)

Reply to
Mahmoud

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