hi groups !
what is the best route in order to use an edk generated mpmc ddr2 controller with a custom processor (not microblaze, but gaisler leon3 or even picoblaze ; this is for edu. purpose...) ?
I have a copy the ddr2_sdram_wrapper.ngc and clock_generator_0_wrapper.ngc files (these are good, tested with a microblaze design).
I read xilinx mpmc.pdf but I am lost ... I think I need interface my cpu with opbv46 port 0, that is : SPLB0_Clk : in std_logic; SPLB0_Rst : in std_logic; SPLB0_PLB_ABus : in std_logic_vector(0 to 31); SPLB0_PLB_PAValid : in std_logic; SPLB0_PLB_SAValid : in std_logic; SPLB0_PLB_masterID : in std_logic_vector(0 to 0); SPLB0_PLB_RNW : in std_logic; SPLB0_PLB_BE : ...
is there a reference design somewhere...?
I know I should use mig, but this seems not be an easy task too...
best regards, raph