When working on the low level design of FPGA modules I usually draw out a data path timing diagram showing what's happening on each sucessive clock cycle.
I have a word 'template' I've been using to do this for years, but I often think it might be quicker/more permanent/better for documentation if I used a custom Timing Diagram drawing program.
A very quick search shows these seem to be the options....
1) Chronology's Timing Designer2) Synapticad's Timing Diagrammer Pro
Top of the range all singing all dancing design tools for complex board design/analysis. Quite complex to use (?) with a reasonable learning curve. Cost ~ $1500 for 1 node locked license.
3) Timing ToolThis seems to be an interim solution, although it looks reasonably powerful. Probably not as difficult to pick up as 1) and 2). Cost - $795
3a) Timing Tool Lite - a web based lower featured version of timing tool.I'd rather be working directly on my PC, although this is free.
4) Timing GenLow end diagram drawing tool, this seems to be fairly new and doesn't include any analysis features. I'm not sure how flexible this is, they suggest importing things into Word to aid annotation etc. Cost - $129.95
I think what I'm lookign for is something between 3) and 4). This isn't essential so I don't want to spend $800 on it, but I think I'd like something a bit more capable than Timing Gen although I haven't experimented with it much, and it would be hard to beat for the cost.
Can anyone offer opinions on the packages above or and other suggestions?
Thanks in advance for any feedback,
Nial Stewart
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