It's not just the documentation, but the intermediate files themselves, such as the wealth of IP that can be extracted from an XDL file from an instantiated design of any significant size. Much of that IP becomes obscured in the bitstream, especially without the source and intermediate files to correlate the bitstream to.
Any project that release intermediate files which use a significant part of the libraries, and other IP cores, does in fact disclose IP which is either directly usable in other non-xilinx designs, or is very easily converted/reverse engineered, rendering the reasons behind the strict EULA terms moot. Files which contain fully routed designs, with back annotated timing information disclose a wealth of internal IP about Xilinx product ... if not nearly all.
The younger generation has played fast and loose with IP now for about a decade. Many do not take the time to read the EULA's or employment contracts they sign, or any other legal document for that matter. I've sat on both sides of the table over the last 35 years, doing faculty sponsored security research (AKA hacking), reverse engineering, and defending my employer/company after others breaches and claims. This whole series of threads has a common theme in that people do not know what the legal requirements are that they are commited to, and frequently assume completely contrary to the exact terms they are bound.
We see this in the vast theft of music and other IP on the internet, and the huge number of P2P proponents claiming it was legal to ignore copyright restrictions against illegal "broadcasting" and "distribution" of music, videos, movies, and computer programs/data because there was no profit involved, or that P2P downloading servers are different from other forms of pay-per-view content on demand broadcasting services. We see in retrospect that the high court rules against P2P using the standard that if it looks like theft, it is theft.
We see the same theme in handling other industries IP, such as Xilinx restricted IP. While I took a lot of heat over the JHDLBits disclosure that after a year, the project was held up in negotiation with Xilinx for IP release, is exactly an example of not negotiating the exact terms of the licenses and disclosure at the begining of a project rather than wading thru all the ramifications in difficult discussions about just what can and can not be released at the end.
That it apparently was resolved to everyones satisfaction, which is great, but the lesson is to take note that these issues need to be resolved before your project gets a C&D letter along with a huge claim for damages from the release of another companies IP.
Many years ago the universities got up in arms when AT&T tried to enforce the proprietary interests in UNIX that were being violated by teaching the source code in class rooms. The issue of educational sites handling NDA restricted material, particularly in the form of EULA's needs to be carefully addressed by our schools.
Here we have a long list of schools treating the IP in Xilinx's ISE software with the same degree of care they would a software title like Norton Utilities. And we have Xilinx employees advocating the same, dispite the very very strict EULA terms. We also have the most respected posters in this forum doing the same.
I'm just tring to be open, honest and ethical in FpgaC's handling of this Xilinx IP - which in order to get equal access as all these other projects means confronting the issues and hopefully getting Xilinx to realize the cat is way out of the bag, isn't likely to be going back in, so we should look at the defacto state of their IP and adjust the licenses to reflect actual use -- or do the very nasty thing of sending everyone C&D letters and forcing all these schools to treat the Xilinx IP with the degree of care the EULA requires.
The kill the messenger reality is a bit tough sometimes ...