ROM inference in Spartan3

Feb 10, 2005 3 Replies

This page:

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shows some templates for ROM inference in Spartan3 using Xilinx's ISE software.



One of the templates is: library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity rominfr is port ( clk : in std_logic; en : in std_logic; addr : in std_logic_vector(4 downto 0); data : out std_logic_vector(3 downto 0) ); end rominfr; architecture syn of rominfr is type rom_type is array (31 downto 0) of std_logic_vector (3 downto 0); constant ROM : rom_type := ("0001","0010","0011","0100","0101","0110","0111","1000","1001","1010" ,"1011","1100","1101","1110","1111","0001","0010","0011","0100","0101" ,"0110","0111","1000","1001","1010","1011","1100","1101","1110","1111" ); begin process (clk) begin if (clk'event and clk = '1') then if (en = '1') then data


FYI: the line: data : out ufixed(0 downto -17)

Causes the following error: ERROR:Xst:1548 - c:/phil/vhdl/svm/../lookuptable.vhd line 13: Negative range in type of signal is not supported.

So looks like you can't use a ufixed (with negative indices ) in a port signal, anyway.

Phil

Why do you want to use negative indice?? it's the first time i saw such thing and so does it work if you use positive indice??

"Phil Tomson" a écrit dans le message de news: snipped-for-privacy@enews2.newsguy.com...

That's how the fixed point package (Fixed_pkg) works. It's a proposed IEEE standard lib. (see:

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) It's the way to denote that part of the vector is to the right of the binary point and part is to the left.

so:

signal ufixed4_2 : ufixed(2 downto -1) := "1010";

would mean that ufixed4_2 is set to 2.5 (the binary point is at bit zero and there are two bits to the right of the binary point and two bits to the left).

Apparently many other synthesis tools (including Altera's) support this and my simulator (GHDL in this case) supports it as well. It's been suggested that ISE's not supporting negative indices is a bug; I tend to agree that it is, and it's impeding my progress.

Any suggestions for working around this ISE bug?

Phil

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