I am looking for some rough estimate kind of numbers. The numbers don't really need to be precise, just guesses and estimates.
Okay, here's what I need. What would the relative number of CLBs needed be for the following types of synthesized circuits (assuming the FPGA they were implemented on did NOT have any special components that would lessen the number of CLBs needed)
- 32 bit integer adder
- 32 bit integer multiplier
- 32 bit integer divider
- Double precision floating point adder (I know this one is expensive)
- Double precision floating point multiplier
- Double precision floating point divider
- Double precision floating point square root
I know there are different algorithms for some of these operations, some are parallel some are serial, just whichever you know would help. Rough guesses are all I need. If you want, just take whichever would be the lease, use that as a baseline of 1.0 for the relative sizes. Thanks everyone.