>
>
> > >
> > > hi all,
>
> > > i have a doubt regarding no.of slices in xlinx
>
> > > what are slices?
> > > what are LUT? in xilinx
>
> > > 1)the no.of slice constant in every version or does it vary?
>
> > > 2)can the area of an architecture be decreased if we say no.of slices=
are
> > decreased.
> > > is this type of approach is correct?
> > > or
> > > 3) how can we say a area of architecture is decreased?
>
> > > 4)i am implementing project which is having the no.of slices in order=
of
> > hundreds.
> > > where as the previous technique implemented have the no.of slices in =
order
> > of thousands from =A0this can we conclude that the area is decreased.
>
> > A LUT is a "look up table" and are how an FPGA implements
> > combinatorial logic. =A0For all practical purposes it is a block of
> > memory with the logic inputs used as the address and the data output
> > used as the logic output. =A0The memory contents defines that logic
> > function implemented. =A0Is that what you are asking?
>
> > For a long time all LUTs in Xilinx parts had four inputs although they
> > did some funky things with multiplexers to allow two or even four of
> > the four input LUTS to be combined into five and even six input LUTS.
> > In some of the newer parts in the high end logic families they provide
> > six input LUTS. =A0This is partly because the parts are getting so larg=
e
> that, like the CPUs in PCs they are having trouble finding ways to use
> > the larger number of transistors. =A0So they are making the LUTs
> > larger.
>
> > A slice is just a grouping of LUTs and FFs and some connective
> > structure into the repeated unit of the FPGA. =A0The number of LUTs and
> > FFs vary with family. =A0Originally LUTs had two LUTs and two FFs.
> > According to the manual "Each Virtex-6 FPGA slice contains four LUTs
> > and eight flip-flops", but they also use the term "Logic Cells" which
> > is not a countable entity in a part, it is a marketing number like
> > "gates".
>
> > Using the number of slices used is not a good metric for the size of a
> > design because if one LUT is used, the slice is counted as used.
> > Better to count the number of LUTs and FF used. =A0You can have 100%
> > slice utilization and still fit more into a chip. =A0But when 100% of
> > the LUTs and FFs are used, you will be hard pressed to add anything to
> > that design!
>
> > Rick
>
> The OP should thank you for doing their (class) homework for them.
>
> RK
Wow, I don't know homework can be done easily online today. The question is, does he remember anything afterward ? I think he does