OpenCore USB 2.0

- M
- Mounard le Fougueuxt
  
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posted
18 years ago

Tue, Nov 16, 2004 12:51 AM

Yo! Does anyone know about about a port of an OpenCore USB 2.0 core to either Xilinx, Altera or plain vhdl (of reasonale price).

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- A
- Andi
  
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posted
18 years ago

Tue, Nov 16, 2004 7:20 AM

am looking for an usb2.0 ip core for plb and opb bus to connect to PPC or Microblaze?

- N
- Nicolas Matringe
  
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posted
18 years ago

Tue, Nov 16, 2004 8:17 AM

Mounard le Fougueuxt a écrit:

Verilog can be mixed with VHDL, and of course be synthesized alone. Keep in mind that this core, when implemented in an FPGA, must associated with an external PHY chip.

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