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Linking FPGAs with RocketIOs

Hi *,

I'd like to establish a high-speed connection between two Virtex-II-Pro-FPGAs, using several bidirectional

3,125Gbit/s-RocketIO-links in parallel (using e.g. Aurora). How do I route something like this properly?

If I want to connect 2 FPGAs that are directly adjacent to each other, the TX-pads are always opposite other TX-pads, and RX-pads always opposite other RX-pads. So the way I see it I'd have to cross each and every TX/RX-pair, like it's usually done in a cross-over-cable...

This makes vias in the signal path unavoidable, something I'd rather not do if it can be avoided somehow. Any tips or tricks for this?

cu, Sean

Reply to
Sean Durkin
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Sean, Rotate one of the FPGAs by 180 degrees. Symsx.

Reply to
Symon

Swap the differential pairs and to polarity inversion on the receiver.

Petter

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Reply to
Petter Gustad

Won't help, the TX/RX positions are exactly the same on top and bottom side. If I rotate one FPGA, I again have TX-pairs opposite of other TX-pairs, so to get to the RX-pair I have to cross signals again, same thing...

cu, Sean

Reply to
Sean Durkin

I take back everything I said and confess my stupidity to this newsgroup... have you ever had one of those days...? :)

Of course Symon was right...

cu, Sean

Reply to
Sean Durkin

rather

receiver.

The p vs n trace order is just a matter of how you route out of the pin field... I believe you can achieve either order at will.

I like Symon's idea of rotating one chip 180 degrees, but if the OP had to keep them pointed the same direction for some crazy reason, he could use the middle MGT for the TX and then one of the MGT's on either side of it for RX, as needed. This only has to be done with one of the devices - the other device can continue using a single MGT for both RX and TX.

Hopefully the OP has a good clock reference and is using a fast speed grade device... 3.125 Gbps is humming!

Great sig!

Marc

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Reply to
Marc Randolph

I think if you connect them head to head (top of device to top), then the TX pads will face the RX pads. You can ignore the pair polarity, since the receivers have a control bit to do polarity inversion.

John

Reply to
John McCluskey

Problem is I need to use *ALL* MGTs, so that wouldn't work for me. But Symon's rotating-solution is perfect.

I'm using the Pletronics oscillator Xilinx recommends in the RocketIO-User-Guide. Speed-Grade is -6 and it's a device in a flipchip-package, so at least according to the Xilinx-specs that should be capable of 3.125Gbps.

cu, Sean

Reply to
Sean Durkin

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