Implementing Haar Decomposition on 256 sample input using only sysgen blocks

Hi everyone, i m trying to implement the haar basis decomposition ona big signal and need to build a model using Xilinx sysgen blocks only, can anyone help me with the code or any suggestions regarding blocks i can use...i have an idea of implementing this as a matrix multiplication (parellel implementation) .....any suggestions?

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Siri
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A google of "harr fpga" came up with lots of hits. Here is the first

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-- Marco ________________________ Marc Reinig UCO/Lick Observatory Laboratory for Adaptive Optics

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Marc Reinig

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