# How to do with guard bits practically?

• posted

Hi, Last time I have posted a question about guard bit in CORDIC algorithm. I have got some good answers from this goupe. When I programe in C to do a simulation, I still don't understand how I do with the guard bits. From one of the papers talking about implementation of CORDIC, it says the input is 12 bits, internal data paths are 16 plus extra 6 guard bits. At the input stage adds 6 all-zero guard bit extension. At the output stage it erases guard bits. And, it also divides two inputs number by 2 at first to prevent overflow. The internal data are represented as signed numbers. My question is:

1. What are the differences between the internal 22 (16+6) bits calculation and 16 bits data plus 6 guard bits extension? Especially I want to get an example to make this question clear.
2. If the 6 extra guard bits are MSB, to erase them will not destroy data? There are 9 stages of CORDIC cells in my application. In my simulation programe I find the high bit in the last stage is at bit 5 (in the guard bits range when I simply use 22 internal bits with there are 6 bits leave off at the first input data stage).
3. Which book talks about the guard bit? Could you recommend me some?

• posted

Sorry for some inaccury description. Following is the corrections.

a. "At every input stage adds 6 all-zero guard bit extension first, then at its output it erases all the guard bits."

b. "There are 6 stages of CORDIC cells cascaded in my application."

As my understanding of CORDIC, its vector/rotation is from the MSB. So, there is no overflow like multiply. I just need consider the CORDIC rotation gain(1.647)? In this considering, besides the input data divide 2, why it needs extra 6 guard bits?

BTW, in the reply to my last post, What Ray said about MAC is right. I found my previous understanding was wrong. In that paper, multiply-accumulate or divide-accumulate are not performed directly.

Any suggestion is highly appreciated.

• posted

It sounds like they are calling the added LSBs guard bits. CORDIC has a gain of 1.647. Assuming the input is left justified, it needs to be right shifted (divided by 2) to accommodate the gain. I am sure what they are calling guard bits are extra bits tacked onto the LSBs to absorb the rounding errors that happen inside the CORDIC as a consequence of the right shifts (I am also accustomed to 'guard bits' referring to extra sign bits, not added LSBs).

SO what they are do> Sorry for some inaccury description. Following is the corrections.

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--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com

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• posted

Thanks, Ray. Your reply is always right and accurate. I owe you a lot! Sorry again for my incomplete description. There are 22 iterations in our CORDIC cells. So, the 6 LSB guard bits are reasonable.

Have a good day!

• posted

Where should I send the invoice? ;-)

Glad to have been able to help.

Jeff wrote:

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--Ray Andraka, P.E. President, the Andraka Consulting Group, Inc.

401/884-7930 Fax 401/884-7950 email snipped-for-privacy@andraka.com