Recently, I read the source code of OR1200. But I am a little confused about the Exception part.
When a exception occurs, the correct execution PC value is found and stored in the "epcr" register. And the "except_type" is set correctly. Then in the next clock, all the instructions in the pipeline are flushed. At the same time, the PC value is set to the exception handling address according to the different exception types in the or1200_genpc.v.
However, I don't understand why the FSM in the or1200_except.v almost set the "extend_flush" signal for 5 clocks. It seems not necessary.
Does anybody know the answer?