Doubt about interrupt handling in AT91

Hi,

Im an undergrad student, with an experience of the past 15 days on the AT91RM9200, the first uC ive worked with, besides the one week spent on an 89c51, so im a real greenhorn to embedded systems. I am confused about why we need to change the mode or the ARM core from irq to sys..the atmel notes mention that the link register and the spsr would be overwritten if another interrupt occurs..in that case, why can we not just push the values of the above registers the stack, and stay in the same mode?

also, when an interrupt occurs, the value stored in the register r14 is PC +4..whys the 4 added??

thanx in anticipation

Mayank

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Mayank Kaushik
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