Can someone confirm the SDIO CRC7 bits input for the 48 bits command and response and 136 response.
For case 1 and 2 the CRC7 is calculated on 40 bits starting from the very first bit - the start bit. For case 3 the first two bits (start and transmission bits) and the six reserved ones, which follow, are skipped. Than 120 bits are fed to the CRC7 module.
The issue explained in detail at
Can someone confirm the SDIO CRC7 bits input for the 48 bits command and response and 136 response.
For case 1 and 2 the CRC7 is calculated on 40 bits starting from the very first bit - the start bit. For case 3 the first two bits (start and transmission bits) and the six reserved ones, which follow, are skipped. Than
120 bits are fed to the CRC7 module.The issue explained in detail at
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