configuring an Efinix T20

If you need some more i/o pins, why not use the RP2350B? They definitely exist - I have one in front of me:

It only has two more package pins, as I recall. How many GPIOs?

It's new and a bit buggy and not widely available, so we'll stick with the 2040. The only upsides are the higher clock rate and the faster floats, which aren't critical in the product line that we are developing now.

Why didn't they make it pin compatible, drop-in to the 2040? Why not put in a mac/phy instead of the extra CPU cores?

Using one SPI bus for multiple loads will save pins. We should be able to configure the FPGA and then read/write registers with a shared SPI interface, and hit some other things too.

It might be tricky to share the interface to the WizNet ethernet chip, and sharing the flash interface wires is something we don't want to even think about.

Of course, once I have an FPGA, I'll have a zillion port pins available.

No. The RP2354B has 24 more package pins and 18 more GPIOs than the RP2040.

Its an 80-pin package with 48 GPIOs.

Yes, there are some bugs. The most critical is probably the one relating to on-chip pull-downs, but it can be solved with external resistors. The ADC is improved. There are more and better i/o state machines. There is a lot more on-chip RAM and there will soon be the option of flash in the same package. There may not be production quantities of the RP2354B readily available yet, but there are certainly some around for prototypes. As I mentioned, I have one.

That would have been nice. However, I don't think the RISC-V added any chip area as the design appears to be i/o bound.

I was thinking about the RP2350, which has 60 pins. That's the chip on the Pico 2.

I didn't even know that there was another small chip, the 2354B. That might be the next step for our product line, in a year or two after the new chips are debugged and available in quantity.

The 2350 data sheet is 1349 pages, possibly a world record.

I can't immediately find a data sheet for the 2354B.

Does the 2350 have a switching regulator on-chip? Microns away from the ADC?

Yes, that’s the one where they found the inductor “polarity” mattered!

People add dithering noise and data lowpass filtering to improve ADC linearity and resolution. Sounds like they included that for free.

(A clever pulse-height spectroscopy trick is to add known analog noise to a signal, digitize, and digitally subtract it out later. Best of both worlds.)

seems like you don't need resistors,

"Set CBUS2, CBUS1, CBUS0, SS_N, and TEST_N using a pull-up or pull-down resistor, or drive them with an external active device."

and in some packages, page 8

"Important: The CCK pin in Q100F3 packages are only available in user mode when the LVDS TX resources are not in use. The CCK pin should not be toggled when any LVDS TX is used."