I am considering controlling a 15MHz VCO with an AVR tiny/mega. I want to be able to set the VCO frequency with the resolution of 500Hz to
1000Hz, in a 200 kHz range, with a closed control loop locking the VCO frequency, based on an AVR with a strict minimum of additional components. Is it feasible? Any reusable code available on the Internet?
I should imagine that everything other than a low-pass filter, and possibly a comparator (and a pre-counter in case the AVR doesn't have the counter ability) should be feasible. The basic algorithm would be a phase-locked loop. The frequency control should be no big woof, but you may need to consider phase jitter in the output. The code should be fairly trivial.
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Chuck F (cbfalconer at maineline dot net)
Available for consulting/temporary embedded and systems.
Well, a DDS would do the job, of course. But I want to minimize the cost, and I already have the AVR and some components of the VCO in place, which won't go away if I add a DDS.
Thanks. I'll look into this deeper then. Do you mean using an AVR's timer to generate a reference frequency, then compare it with the VCO's output (prescaled), then process numerically the obtained phase difference? The VCO being controlled via a PWM?
Where you put the variable scale (ref or feedback path) controls whether you set frequency or period. I would simplify the output (PWM is too slow) to two output pulses, for phase leading and phase lagging. Feed them to the + and - inputs of an op-amp, which will also provide the low pass output filter. Since you want a resolution of 500 Hz that will be the repetition frequency of those pulses. Their length will be proportional to the phase error, and will normally be short. It may be worthwhile using some external logic to generate them.
The cpu will be providing the user interface, scaling, etc.
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Chuck F (cbfalconer at maineline dot net)
Available for consulting/temporary embedded and systems.
You've really only described half the problem here. For example, lock up time, phase noise, jitter limits, varicap / inductor or chip style vco, accuracy, what sort of phase detector etc...
I'd like to see the analog construction beating the AD9850 in price and giving the resolution you want. I assume that there is no sense in having a resolution of 0.5 kHz/step, if the frequency does not stay put inside of a couple of kHz.
You can use DDS to change the frequency for every cycle.
A better solution is to use the AT90PWMxxx circuits The AT90PWMxxx has resolution enhancement so you can change the average frequency in 1/16 steps. Around 200 kHz, the resolution would be ~170 Hz.
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Best Regards,
Ulf Samuelsson
This is intended to be my personal opinion which may,
or may not be shared by my employer Atmel Nordic AB
Almost anyting is feasible. Do you need true phase lock, or just frequency generate to 500Hz ? What jitter can you tolerate ? Response times ? Do you already have the VCO, and just want to measure its freq and control the Voltage in ? How important is the 500Hz step ?
Not as a Fin/N,
Certainly look at the 90PWM series, as they have a PLL built in, and they do have 4 bits of rate-multiplier as Ulf mentions - but that does introduce cycle jitter, which may, or may not matter.
If you want to count an external, existing 15MHz VCO, from a Xtal operating AVR, you will need an external Divider, as most uC sample the Ext_CLK pins (in AVRs this gives < Fxtal/2.5 as margin)
You could feed the XTAL on the AVR, from the VCO, and use another timebase to capture, if you can tolerate the AVR clk varying with the VCO.
I am evaluating what I could do with an AVR and the oscillator of the SA612 (Lx(C+varicap) Colpitts). The oscillator is tuned with a varicap, currently driven by a manually-controlled 10-turn analog pot. The frequency stability is quite good (the present, slow drift is ok), and the tuning resolution is way better than 500Hz. With the AVR, I would hope to replace the analog pot (+ multiturn dial) by something much cheaper. The AVR would also take care of the slow freqency drift, adjusting the driving voltage by steps small enough to bring the freqency back to the target one +- 500Hz. The user experience would be strange a bit, but that's ok.
Lock up time: 0.05s Phase noise and jitter of the VCO - I don't have the figures, I am using the oscillator of the SA612 in a Lx(C+varicap) Colpitts configuration. More details on the oscillator: the oscillator is tuned with a varicap (through a small network of capacities, to scale the tuning range to
200kHz), currently driven by a manually-controlled 10-turn pot.
With the AVR, I would hope to replace the analog pot (+ multiturn dial) by something much cheaper. The AVR would also take care of the slow freqency drift of the VCO, adjusting the driving voltage by steps small enough to bring the freqency back to the target one +- 500Hz (or better??).
=> the resolution is (just slightly) better than 500 Hz ; 30 000 being the divisor of the VCO frequency. This requires 2 16 bit counters (+ a counter to do PWM to control the VCO). AtMegas have 4 16 bit counters (a bit overkill in other aspects)
I don't requre the phase lock, just the digital frequency control, with less than 500Hz steps. The VCO frequency is allowed to slowly drift around the target frequency +- 250Hz.
Hmm. The VCO signal is mixed down with the input stable signal, then
2-nd stage mixed down to an audio tone. The audio tone should be clean enough...
To settle within 0.05s
Yes, it's an L(C+varicap) Colpitts based on SA612.
It can be between 400 and 600 Hz, or so. 240 almost equal steps should allow to cover 100 kHz.
How about measuring the period, using a divided VCO signal as an external capture events on a AVR timer, do you know what margin that would give?
Yes, I know these devices. I would like to rule out the possibility to do the corresponding functions in the AVR first.
With the exception of the lockup time, the requirements sound pretty loose - not even phase locked loop territory, more like an afc / frequency locked loop system. My guess is that if you are prepared to sacrifice initial lockup time, a timer set up to generate pwm, with a long time constant filter on the output, could handle the control bit. The remaining problem is measuring the frequency of the oscillator, which at 15Mhz might not be possible using a pulse counting timer alone.(haven't used avr) You'll probably need to prescale the vco to bring it within range. The last thing to consider is the vco / varicap non-linearity. You may need a lookup table to linearise the v/f characteristic to avoid wild variations in control loop gain, though you may get away without having to do this. Plot the v/f curve on a graph to get some idea of what's needed.
So, as you'll need more hardware to make this fly anyway, why not aim higher and consider one of the Motorola or similar serially programmed pll chips ?. They have reference oscillator, prescaler, programmable divider and phase detector all on chip and are really low cost. It's years since I last used them, but the cmos data books will have all the details and there's a 20 year history of application notes to do most of the work for you...
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