Timer 2 overflow = interrupt 5?

Oct 20, 2003 3 Replies

Hi there..



Getting timer 2 to signal an interrupt using C code was a bigger task than I expected. This is the code that seems to work, but I don't have any clue on why it works - perhaps someone here can point me in the correct direction? When I look in the documentation to the 80c535 it mentions that interrupt 5 is tied to the CC2 / P1.2. When you look at the code you'll discover I don't touch the register/pin at all.



#include #include



void timer2(void) interrupt 5 { TF2 = 0; }



void main() {



TH2 = 0xff; // timer 2 high byte TL2 = 0x50; // timer 2 low byte EAL = 1; // enables global interrupt thingy ET2 = 1; // yup to timer 2 interrupt



CRCH = 0xff; CRCL = 0x50;



T2CON = 0x11; // boots the timer



while (1) {



}
}


Thanks in advance!


I doubt, therefore I might be.

INT 5 is probably used for timer overflow if timer 2 is enabled and triggered by P1.2 if timer 2 is not enabled. Lots of pins on microcontrollers are dual mode.

But the problem I have is that the documentation doesn't mention this, it does mention that a timer 2 can generate an interrupt - but it sneaks around explaining exactly what interrupt it uses..

I doubt, therefore I might be.

Hi, if you look in the manual under "interrupt structure" you should find a list of what sources each interrupt. It's too important not be listed somewhere.

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