powerpc sync and eieio instructions

Don't you want to know about caches, too? ;)

Here is an imprecise non-authoritative summary:

eieio - prevents the CPU from reordering memory accesses. The best example is when a program needs to update peripheral registers in a particular order.

sync - ensures that the effects of instructions have completed with respect to external devices (e.g. other CPUs and peripherals)

In answer to the multiprocessor part is this ... peripherals are "processors" ... especially DMA controllers when they don't snoop the bus. These instructions are also important in multi-threading.

Read it again ... and again ... the terminology is "interesting" and worth understanding.

What sync does is make sure that all previous instructions have finished doing what they have been doing ("retired", as they have it).

For example, if you want to disable the interrupts and subsequently do something, if you just change the flag in the MSR you may still be interrupted a few cycles after the "move to MSR" opcode has been executed (i.e. subsequent opcodes will execute before the flag change takes effect). So you have to change the flag, execute a "sync", after which you will know interrupts are masked.

Dimiter

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Original message:

Just to check how long this will take - my former message took hours before it appeared in google groups - apparently they have a posting delay at the moment, trying to measure it - now it is 16:33 GMT.

Dimiter

Here it shows as posted at 12:32 PM, EDT, and it was propagated to teranews.com server and received here by roughly 1:30 PM EDT. FYI.

Got it at 17:58 GMT, may have appeared up to 30 minutes earlier (time between checks).

Dimiter

Thanks, shows about the same delay - probably google posting is slow for some reason. Perhaps they are trying to wrestle the spamwave, in a futile way judging by the amount we keep on getting. Frankly I would not mind typing in a captcha per posting (per group on crossposts!) if that would help.

Dimiter

Original message:

All that showed was that the delay was no more than roughly one hour. The time of pickup depended on my decision to download.

Hi, I've read some references about eieio instruction use but I've still some doubts.

The code that confused me is that (about MMU initialization):

Page Table Updates (from MPC7450UM -> 5.5.3)

Thus the following code should be used: /* Code for Modifying a Page Table Entry */ /* First delete the current page table entry */ PTEV