Nested interrupt

Dec 05, 2009 6 Replies

Rate this thread:

thiru_vid 16 years ago

Timer1 ISR _______________________________________________________________ | | | |___________

Timer 3 ISR _________ _________ ________ _________ ________ | | | | | | | | | | |_____| |_____| |______| |_____| |

I am using TMS320F2812 microcontroller. i need to implement the timer 3 ISR are executed within Timer 1 ISR. Is it possible to implement the same?

Any one can you please help me for that.

--------------------------------------- This message was sent using the comp.arch.embedded web interface on

formatting link

Vote

Rich Webb 16 years ago

A dual core? An FPGA? Otherwise, as described, I don't see it as possible. If Timer3 preempts Timer1, leaving 0.5 usec out of every 2.0 usec available for Timer1 (not counting overhead), then Timer1's task will take 32 usec to complete a single calculation. QED SOL.

Rich Webb Norfolk, VA

Vote

karthikbalaguru 16 years ago

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 |___________ =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0

=A0 =A0 =A0 ________

=A0 =A0| =A0 =A0 =A0 =A0 | =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0|_____= | =A0 =A0 =A0 =A0 |_____| =A0 =A0 =A0

But, if there is no preemption, then it should be feasible as Timer3 occurs every 2 us while Timer1 occurs only every 10us. But, i wonder how it will be able to function when it is in the

5th interval because during that scenario/occassion, timer3 and timer1 will both be trying to get executed and some kind of racing might happen . Any ideas ?

Karthik Balaguru

Vote

Geek 16 years ago

Yes

Use software interrupt priority.

You must use Software Prioritized Interrupt PIE Block Specific Support Files.

Read SPRC097.

Vote

Rich Webb 16 years ago

|_____| |_____|

If there is no preemption, then Timer3 won't be executed within Timer1. If there is, Timer1 won't complete its 8 usecs of calculations before the Timer1 interrupt fires again. One or the other, not both.

Rich Webb Norfolk, VA

Vote

Arlet 16 years ago

|_____| |_____|

No, as described, Timer1 takes 80% CPU time (8us every 10us), and Timer3 takes 75% CPU Time (1.5 every 2). Those add up to more than 100%.

Vote

karthikbalaguru 16 years ago

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =A0 =A0 =A0 =A0

=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 |___________ =A0 =A0 =A0 = =A0 =A0 =A0 =A0 =A0 =A0 =A0

_ =A0 =A0 =A0 ________

=A0 =A0 =A0| =A0 =A0 =A0 =A0 | =A0 =A0 | =A0 =A0 =A0 =A0 =A0 =A0| =A0 =A0|_= ____| =A0 =A0 =A0 =A0 |_____| =A0 =A0 =A0

Is it

Hmm,Agreed. Did not notice that even though the processing time of timer3 is 1.5us only, the timer3 occurs every 2us.

Karthik Balaguru

Vote

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required