HC12 Jtag

Apr 30, 2005 8 Replies

Hey



Anyone have a design for a Jtag interface to a MC9s12NE64, it has to run 3v3 and 25Mhz..



it's not easy to use that much money as a student :(



Kasper


"Repzak" schrieb im Newsbeitrag news:42738c73$0$79461$ snipped-for-privacy@news.sunsite.dk...

3v3

you dont need to run at 25MHz, 25MHz is the maximum possible !! just add 4 wires to printer port and that will do as well :)

antti

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Hej

Well when i have to make it work with the E-MAC/Phy in the uC i have to run

25Mhz to fit their speed and end up with 100mbit

but kan i run diferent speed on the jtag than the master clock ?

Kasper

"Repzak" schrieb im Newsbeitrag news:42739405$0$79453$ snipped-for-privacy@news.sunsite.dk...

run

JTAG clock is TOTALLY ASYNC and totally independant ! from 0.01 Hz to the maximum supported by the JTAG port (this may be higher then the max clock for the chip)

antti

"Repzak" schrieb im Newsbeitrag news:427399dd$0$79458$ snipped-for-privacy@news.sunsite.dk...

higher

please contact me per email snipped-for-privacy@truedream.org

antti

Hey again, sounds nice, do you have a link to a schematic there is easy to build and will work ?

thanks

Kasper

"Repzak" schrieb im Newsbeitrag news:42738c73$0$79461$ snipped-for-privacy@news.sunsite.dk...

3v3

actually you are totally mistaken. the NE64 does not have JTAG at all. unless you are going to use NE64 as JTAG MASTER in what case the speed is most likely irrelevant. in any case achiving 25MHz sustained JTAG update in master mode is almost not possible without dedicated JTAG master hardware.

but i assume you are talking about the BDM not JTAG? for BDM yes the 25MHz is important that is dictating the bit timing

antti

Heh, of cause it's a BDM.... can't figure out why i have exchanged these words :(

Kasper

Besides the elmicro.com ComPOD12,

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describes a really cheap BDM tool named TBDML.

Oliver

Oliver Betz, Muenchen (oliverbetz.de)

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