the Top Boot is faster. The bits fall from higher.
just read the datasheets.
yg
http://ygdes.com / http://yasep.org
Boot Block of NOR flash memories ??
Apr 14, 2010
9 Replies
First reply
This has a strong smell of a study assignment, but ... 001. Boot block is an erase block which is split into smaller pieces than an usual erase block on the chip. 000. A bottom boot chip has split the lowest-address erase block into smaller pieces, a top-boot chip has the split…
Read the full replyHI, I have the following queries based on the Flash Memory,
000. What is the advantage of Top Boot Flash Memory and What is the advantage of Bottom Boot Flash memory ?
001. what are the other differences between these Boot Block based Flash memories and Normal Flash Memories ?
Satish
This has a strong smell of a study assignment, but ...
001. Boot block is an erase block which is split into smaller pieces than an usual erase block on the chip.000. A bottom boot chip has split the lowest-address erase block into smaller pieces, a top-boot chip has the split block at the highest addresses of the chip.
Tauno Voipio, MSEE
tauno voipio (at) iki fi
Professor says do your own homework.
Hint, where does a 68000 start executing code on startup? An x86 processor?
Wrong, wrong, wrong. (Not true.) The bits from the top-boot have to filter down through all of the non-boot blocks, which takes -longer-.
Especially if the non-boot blocks are programmed - 1 bits have a lower co-efficient of friction than 0 bits do.
The real problem with bottom-boot is that if you do a lot of debugging, all the dead bugs tend to collect there and clutter things up.
RK.
damn right. I completely forgot those implementation details. That's why I prefer to use magnetic bubble memory.
yg
http://ygdes.com / http://yasep.org
oh, yes, just flip the MSB. the price of a single-gate inverter like SN74LVC1G04 is not so high today. But isn't the inverter gate's delay over-compensating the faster access ?
yg
http://ygdes.com / http://yasep.org
That's why I always invert the address bits.
but then you will get all your data negated ! so this displaces the inverter gates from the address bus to the data bus, with no speed gain.
yg
http://ygdes.com / http://yasep.org
Not if you get the inversion by soldering the memory chip upside-down.
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