Atmel Introduces World's smallest Microcontrollers?

Wow, I want a Beowulf cluster of those!

-a

Aimed at high vol professional use, not small business/hobbyist. Each package has its merits...

MICROCHIP HAS BEEN & IS SUPERIOR TO ATMEL OR ANYONE! IF WORLD'S SMALLEST PACKAGE (as you claim - Atmel) DOESN'T DO ITS JOB AS WELL AS MICROCHIP INC. THEN THERE'S NO USE FOR IT.

MICROCHIP HAS BEEN OFFERING uDFN packages and/or waiting for market reaction anyway, as per their V.P who emailed me in response to my suggestion to keep PDIP packaging for easier prototyping, which is the opposite end - IC's largest package.

He said uDFN is extremely difficult to install on circuit boards, also reliability is an issue. But technologically Microchip has uDFN, it just doesn't know if market woudl care for IC package which in essense is BARE SILICON DIE with a thin layer of passivation/protection. The next step would be simply a bare die which cannot be installed on circuit boards, b/c it should hermetically sealed

Baredies is the only way to create RF/Microwave ciruitcs above 3GHz or so, I've spent years with people doing it, upward to 65GHz and believe me designing a circuit is much easier than building it when package size is smaller than certain limit - we even have many people who CRUSH components with the forces of tweezers used ot pick up component & drop into circuit housing.

uDFN is an extremely difficult package to work with without a Microscope. I personally prefer Microchip to Atmel, anyway.

You should see new Microchip offers on their parametric search webpage, I've been using PIC18F4520 on theprevious project and now they offer a PIC with a dozen Timers, 80MHz clocks, enormous number of A/D & PWM channels, etc. And this beauty costs $3-5??

Try to beat that Atmel.

========================= Stan Starinski Phone (mobile): +1 (646) 416-2052 Web:

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Consulting Engineer (EE+ME, ECAD+MCAD [3D/2D]), R&D + Prototype, Embedded/Firmware ["C" or ASM for Microcontrollers], computers). Past clients: MTT Corp, XigoNanotools, Amplitech, Miteq, Vematech, KirbyLester, Universities, WaltDisney/ESPNzone

hmm...NXP are already way ahead of that on density.

They pack TWICE as many pins into a BGA just over 2mmx2mm

NXP also has MUCH more MEMORY!!

NXP: 32KF, 8KR vs Atmel: 1KF/32bR

So, you'd need 32 Atmel parts to match in CODE, and a whopping 256 to equal the RAM....

-jg

but the cost!

The NXP page you cited lists the dimensions at "2.17 mm² x 2.32 mm², thickness of 0.6mm" Can I safely assume that they actually meant to write "2.17mm x 2.32mm"? Because if they didn't, I'm not sure how to interpret or trust those dimensions.

However, most Engineers would agree that the Atmel 2mm x 2mm package is still smaller.

Bill Giovino Executive Editor

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thickness of 0.6mm"

Because if they

till smaller.

Sure, but most engineers I now, are smart enough to grasp the difference between Density (which is what I wrote) and Area ;)

Most designers are more interested in Functionality per area, than absolute area, some are interested in Price/area, but vendors do try for whatever wriggle space they can find, for bragging rights.

You also missed out on your banner claim "Atmel introduces the worlds smallest microcontrollers", because someone else already has an 8 bit,

2mmx2mm package Microcontroller, (with 10 pins, more code and more Ram) so Atmel is second even there.... oops.

-jg

thickness of 0.6mm"

Because if they

smaller.

I'm always a bit suspicious when I read the phase "Atmel Introduces". What this usually seems to mean is "Atmel's marketing dept aspires to...", rather that "Atmel is shipping".

Is this actually a real product, or just something they might make in the future if enough customers show interest?

Martin

"MartinWalton" wrote... :

this

"Atmel is

future if

If you discover that the product isn't real, please let me know.

-Bill Giovino

Update to

The uDFN package has not yet been characterized by Atmel.

Bill Giovino

Package HAS been characterized and the article updated.

"Bill Giov> Update to

I wonder why the MCU market is so different from the FPGA market? Seems the MCUs are all trying to get smaller and smaller with more and more in the package. FPGAs seem to demand high pin counts and so they either are in huge packages or BGAs with very fine ball pitch. Is there just no real market for medium capacity FPGAs in low pin count, cost effective packaging? I would love to get up to 10,000 LUTs in a

48 TQFP or even a similar QFN. At this time I would settle for even 1,000 LUTs in a 32 to 48 pin TQFP or QFN.

Rick

Good question - some of the tier-2 players, do have offerings in QFN, but the main players I think have become victims of their own success.

To open new markets, leading edge FPGAs have to get ever more dense, and that pushes into BGA packages. Once they are over the BGA hurdle, it is not easy to get back. Some systems NEED those low L paths, and high layer counts.

Those that want a TQFP48, also want a uC area price, and there is not enough revenue, to fund the development. Another indicator, is CPLDs have seen remarkably little new R&D over the last 5 years.

The Cypress PSoC are interesting, but their published prices (peak over $20) really charge a premium above a CPLD+Generic uC - so they target a niche, not the mass market.

-jg

The XMOS parts may fill a few gaps here.

Yes, nice looking silicon - and a good direction and concept.

We did a candidate design on these, and needed the newest 500MHz device to meet timing.

However, their docs were quite poor, especially around assembler which you DO have to use on tight timing stuff. When I suggested some learning pathway improvements, their response was dismissive, which I guess explains how their docs/files came to be sub-standard !!

Icc is not low, but it is at 1V, so you need to add a decent sync smps to the budget.

-jg

I've been looking hard at the PSoC devices as well as the Actel Fusion parts. Both are a bit pricey, the Fusion is way pricey. The PSoC devices aren't really all that programmable from what I have seen. Their logic blocks are "lumpy", larger grain than conventional LUTs and not as general purpose. Their analog is rather limited too as is the Fusion analog.

To combine with an MCU, the CPLD doesn't really need to be too elaborate. But it needs to have some bulk. Just adding 10 or 20 macrocells doesn't do the job for me. I'd like to see 500 to 1000 four input LUTs (with half as many registers and the usual FPGA stuff like some carry chains) along with a Cortex MCU. Heck, if you add a reasonable size of FPGA you could leave out all the digital peripherals since they can be added as needed. When was the last time you needed even half the peripherals on an MCU? By keeping the pin count to the same number MCUs would otherwise have, the testing time is minimized and the FPGA chip area doesn't add a lot to the cost.

But the MCU makers don't have patents, tools or IP for FPGA work and the FPGA makers are happy with their 1000 pin BGAs.

Rick

I'm not that impressed with the XMOS parts. Yeah, its nice having eight threads running at once, but each thread is only 62.5 MIPS. I have tasks that would be marginal even if one thread is devoted to it. My real issue is the power consumption scales with clock frequency and is no better than other processors. I guess if you dig enough you can find ways to minimize the power consumption, but I don't see where it is a big improvement over other MCUs. I think XMOS is not much of a replacement for many FPGA apps. It can be useful in some limited set of application requirements.

Rick

The Cypress reports show 192 macrocells, with a fan-in of 12, so that's up to ~600 4iLUTs I found if I coded carefully, working just under that fan-in ceiling, then it was predictable, and packed well.

Go too much above that, and the tools run off on their own a bit..

What Cypress forgot to do, was allow Logic fabric access of RAM blocks. They have RAM in their blocks, but they failed to give the flexible ram many FPGAs have. Price is the biggest beef, as a generic 32 bit uC plus a CPLD, is looking way cheaper.

-jg

What Cypress parts are you referring to? Are you talking about the PSoC3/5 devices? I had the impression that they were specialized logic block similar to the PSoC1 devices. It has been a while since I looked at the PSoC5. Once I realized I couldn't do stereo, CD quality audio they became a lot less interesting to me.

Rick