Does anyone know the exact timing of the internal UART on an 8051 based microprocessor (actually it's a Dallas 80C320)? As I understand it, when transmitting, the TI bit sets a the _beginning_ of the stop bit of the byte. So if you wait for the TI bit to go true, and immediately write another byte to SBUF, does this immediately start transmitting the start bit of the new byte, cutting short the stop bit of the previous byte and potentially leading to a framing error in the receiver? If so, do I have to wait a short 1 bit-time delay after seeing TI before writing the next byte to SBUF?
If this doesn't happen, why not? What feature of the chip prevents this from happening?
If this is the last byte, I want to turn off the RS485 driver so I can wait for the reply. For a similar reason, do I have to wait for 1 bit-time after seeing TI before turning off the driver?
And if I'm the receiver (and let's say there are several devices listening to these messages) I understand that the RI bit sets half way through the stop bit of the character. Does this mean that if I want to reply to the message, I have to wait 1/2 a bit time (maybe 1 bit-time would be safer) after seeing RI before turning my RS485 driver on to avoid corrupting the stop bit, which could lead to receive errors in other listeners?
If they're necessary, what's the best way of implementing these delays for reliable RS485 operation?
Thanks - Rowan
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