8051 64K external SRAM possible?

Of course.

Yes. ( and WRN -> WEN and RDN -> OEN )

Yes there is no problem with using the full 64K for SRAM. The reason that people often use 32K is that 32K chips are cheaper and secondly, it keeps some memory space for mapping external peripherals such as A/D chips etc.

I've done banking with 6811s with up to 1M of space. Works well for static kind of memory, but puts some trickery in the code. Hopefully your compiler supports it.

In article , andrew queisser writes

Of course it is possible. P0 and P2 give 16 address lines. You are adding XDATA which is 64K external data. This is a seperate space to the iData and Data. (though confusingly some 51]s have "internal xdata" that is an additional space.)

There is a description of this in thje C51 Primer at

/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ \/\/\/\/\ Chris Hills Staffs England /\/\/\/\/\ /\/\/ snipped-for-privacy@phaedsys.org