NAND Gates Rule!

Go to the "Boolean algebra" section of your textbook, or ask the teacher.

Good Luck! Rich

Nly f u cn lrn 2 spk Nglsh.

Hope This Helps! Rich

You're looking at it the wrong way. NAND and NOR happen to be universal; most of the others aren't (of the 16 binary gates, 6 are universal, the other 10 aren't).

The 6 that are universal all have the behaviour that one input is either ignored or inverted depending upon the other input. The differences are which input is which, and whether the "ignored" state results in a 0 or 1. These 6 gates are:

!(A+B) !(A.B) A.!B !A.B !A.!B A+!B !A+B !A+!B 00 01 10 10 11 11 10 00 00 11 01 10

The computers on each of the Apollo modules and the upper stage of the Saturn V were made from dual NOR gate packages.

NOR is the natural gate for ECL, as NAND is for TTL.

Flatpack 914 or 923 RTL?

I see a close-up of the die with wirebonds, but not of the package. The wires go to opposite sides, like in a DIP.

So, was the 923 always in a round package?

The Saturn V IUS computer was an IBM design. SLT (DTL), IIRC.

The ones I have are flatpack, bought surplus from poly-Paks and marked NASA.

The Control Data/Bendix G15, the one they had at my high school ca. 1965, had tubes. :-)

Cheers! Rich

i already explained: the mobility of holes is less the the mobility of electrons.

NOR USB Flash drives would have used more power wastefully because hole mobility is less than electron mobility. The CMOS circuits use NMOS NAND structures because electron mobility in silicon is 1200 cm^2 per (volt*second). Hole mobility is 3 times lower! If NOR memory arrays had been used for USB Flash drives, the PMOS stack in the NOR array would be 3 times as large, with 3 times the capacitance. Power of capacitive loads is 1/2fCV^2 where f is the frequency of switching on and off a memory cell. C is the capacitance of the PMOS drain/source capacitance plus parasitics. V is about 1.2 volts for modern silicon chips. The power of NOR is not the same as the power of NAND. But the logic has the same capabilities. With one million NOR gates , I could build a computer.

nor has a stack of pmos in series : uses more power. nand has nmos in series, so lower power.

Why NAND gates can't be produced with XOR?

xor has the symmetrical truth table. nand has asymmetrical truth table

so no amount of symmetrical logic of xor can give unbalanced logic. try it out in schematics yourself, it is TRUE!

xor

nand

Incredibly, my high school didn't contain a single computer almost 20 years later. In 1983 it had 2,800 students, 1 flight simulator, a few typewriters in the library.

The local university offered us a PLATO terminal (in '67) but the superintendent's office refused, saying that if there was a computer in the classroom students wouldn't learn math (a silly proposition even then). The university then gave classes and free time on the 360/75 to any local high school student who want it, doing an end-run around the school administration. The college wanted to find out if high school kids could learn how to program (not so silly, since CS was in the graduate school at the time). I took them up on the offer both my junior and senior years. The CS types were a little miffed that we got all the time we wanted (they certainly didn't) and were competition for punch time.