MOSFET packaging

Hi,

I'am putting together a H-bridge and I have found some interesting SO-8 MOSFETs with combined P/N channels on the same chip. The maximum power-rating for such packages seems to be 2.5W. But many of these mosfets have a rating of several amperes continous current.

If I have a MOSFET like this with e.g. Ids continous = 4A, and Pmax=2.5W, does this mean that Vds cannot be larger than 2.5/4 = 0.62V ?

Am I right to say that the ampare rating for such MOSFETs is not relevant for driving motors, except perhaps small lov-voltage motors with low torque and high speed?

Now, for TO-92 or I-Pak power MOSFET the watt-rating is suddenly very high. What MOSFET packaging would cover the usage between these extremes? For example, I have some very small Lithium-Polymer batteries with several amperes discharge current. If I want to drive a 3V motor with 1A current using such a battery I would need a mosfets that can handle about 4W to be safe. Most of the TO-92 power mosfets I see seem to be completely overkill for this, and I also want things to be as small as possible.

erik

Reply to
ErikBaluba
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Power dissipated by the MOSFET depends on its own Vds, not the drop across the load. A 4A mosfet can pass 4A as long as the drop *across the mosfet* doesn't exceed 0.6v when it's conducting. The drop across the load can be whatever you want, as long as you don't exceed the other parameters of the mosfet (like max off-state Vds).

If you have a 3v motor with 1a current, the *motor* dissipates 3 watts, but that doesn't mean the *mosfet* does. Let's say the on resistance of the mosfet is 1.5 ohms. At 1A, it's a 1.5 volt drop. That's 1.5 watts of power dissipated by the mosfet itself.

Reply to
DJ Delorie

  • I) so power is still low.

So average dissipation in the MOSFET will be (Rds(on) * I * duty-cycle), where duty-cycle is the fraction of time that the MOSFET is turned on for.

When you look at power ratings, keep in mind that the power has to get dissipated as heat, and that heat has to go somewhere. So you need to consider "thermal resistance", which is expressed in degrees C per watt. The datasheet will tell you the junction-to-ambient resistance. For instance, a TO92 case might have 200 C/W of junction-to-ambient thermal resistance. That means that if the MOSFET is dissipating 0.5W, the junction temperature (which is what matters) will be 100C hotter than the air around the transistor. If the air around the transistor is 50C (and remember, if you have your electronics inside a case, it will be hotter than room temperature), that means the junction is 150C, which is probably its rated maximum.

So you can see that it is usually thermal resistance that is the real power limitation - the rated power maximum of the device is not the first thing you run into, unless it is mounted to a very good heat sink.

Reply to
Walter Harley

when

Rds

Ok, but I assume you mean power dissipation is Rds(on)*I*I*duty-cycle?

...

power

Thanks a lot, that was a very useful. I tend to skip pass those C/W parameters in the datasheet :-) I would think those ratings will not vary much for different SO-8 MOSFETs, I will take a look around again.

As for Rds(on) ratings, it seems this follows the same principle as resistance in a copper-wire, where tick wires have less resistance and thus lower voltage drop and power dissipation? I noticed that only physically large mosfets in TO-92 casing etc provide really small Rds(on) in the milli-ohm range. The smallest Rds(on) ratings I found for MOSFETs in SO-8 casing was several Ohms, and with a much higher power dissipation as a result.

erik

Reply to
ErikBaluba

Correct. Sorry, my mistake.

You're right; for a given package type you won't find a whole lot of variation. Laws of physics, and all that.

Note that for surface-mount components, free-air thermal resistance is usually very high; but in practice, they dissipate their heat through the leads, to the circuit board traces. So you will typically see a thermal resistance spec for that, too; and it will often specify how big and thick the traces need to be.

Roughly speaking, yes, it has to do with the size of the channel. Of course, they play all kinds of interesting tricks to improve Rds(on) while keeping the die small. But the more channel area, the higher the gate-to-source capacitance is (for a given breakdown voltage, anyway), which introduces other problems; so there are a bunch of tradeoffs.

Reply to
Walter Harley

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