digital delay

I need to delay a square wave (0-5V, 0.25Hz, duty cycle=12.5%) one second. The only way I knew to delay a square wave was to use some NOT gates, but it doesn't work with such a low frequency. Can you help me?

Reply to
zoidberg
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Sounds like the pulses are constant? Don't vary at all? Why not just set a timer to gate them through one second after whatever initiates this?

Or, with constant pulses, clock them through a series of flip flops using the .25HZ as a clock signal to trigger the FFs - only four flip flops . . .

If the pulses change duty cycle and that change needs to be delayed by one second life gets harder.

FIFO digital serial memory could be used for varying pulse widths. If the clock is running at a high rate of speed with respect to the signal, and the memory storage is large enough, the amount of "jitter" (timing inaccuracy) can be minimal. 2000 storage cells would give you .5 millisecond of jitter.

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Reply to
default

Not exactly what I meant. To preserve the duty cycle will take more than four flip flops - or 8 for each quarter second

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Reply to
default

--
Yes, of course, but it\'s not a square wave if the duty cycle\'s
12.5%.

Is this what you want? (View in Courier):

  t0-->||               || ||   ||               || |
Reply to
John Fields

John Fields ha scritto:

Yes, exactly this.

Reply to
zoidberg

default ha scritto:

Yes.

How? I just started "playing" with electronic stuff and I don't know many things yet :-)

Well, this was just an experiment, I don't want it to cost too much or to become too complicated.

Reply to
zoidberg

A lot of good advice here. If you've got fixed frequency/duty cycle, it might be best to just have the PGT and NGT of the square wave each drive 1 second time delays, and have the timers' outputs set and reset a flip-flop whose output is the 1 second delayed output.

If you want to use a serial shift register, you could do worse than using the CD4517, which is a dual 64-bit shift register. If you daisy chain both shift registers, and use a 555 to get a period of a little less than 10ms., you can have a complete hobbyist 2 chip solution for a couple of bucks which will give you 10ms. max timing inaccuracy. If you want better than 10ms., you can always daisy chain a couple of

4517s for improved specs. I believe they're about a buck apiece from hobbyist sources like Jameco. Two will give you 5ms., 4 will give you 2.5ms., &c.

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Do either of these sound like good ideas? Does this answer your question?

Cheers Chris

Reply to
Chris

Read up on AND gates - the AND function requires two signals to be present to obtain an output. Make one signal your pulses and the other the control that changes state after one minute (controlled by a timer like the NE555 or something more sophisticated if you need spot-on accuracy.

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Reply to
default

Here's a schematic of the second idea (view in fixed font or M$ Notepad): | VCC | + | | VCC VCC | | + + | .-. | | | | | .--o---o--. | | | | 8 4 | VCC | '-' | | + | | | | | | o------o7 | | | | | 3o---------o----)--------------. | .-. | 555 | | | | | | | | | 4| |16 12| | | | .---o6 | .--o----o--. .---o-------. | '-' | | | |CLKa Vdd | | CLKb | | | | | | | | | | | o--o---o2 | | |5 9| | Sig Out | | | 1 5 | | Q64ao-------o Db Q64bo---->

| --- '--o------' | | | |11 | --- | | | | | | | === | 1/2 4517 | | 1/2 4517 | | | GND | | | | | === | | | | | GND | | | | | Sig In 7| | | | | >-----------o Da | | | | | | | | | | WEa Vss | | WEb | | '--o----o--' '--o--------' | 3| |8 13| | === === === | GND GND GND (created by AACircuit v1.28.6 beta 04/19/05

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As was mentioned by another post, you'll set the 555 frequency according to the number of steps. Since the 1 second delay will take

128 steps to go through both shift registers, your 555 frequency should be set for 1/128 second, or about 7.8ms. Your error will be a maximum of +/- 1 timing period, but that might be acceptable to you.

As I said, the most accurate, simple way to do a one second delay of the exact signal you describe might be to get signal positive and negative edge triggers, and have them both trigger accurate monostable one shots, which then set and reset a flip-flop.

If you have to have more accuracy in the delay, or if there are other considerations, please feel free to post again. Please also describe the intended use for the delay -- it might make it easier to figure out what you need.

Good luck Chris

Reply to
Chris

Thank you! The second idea sounds good.

Reply to
zoidberg

I should have noted that there's +/-7.8ms. timing inaccuracy for both the PGT and NGT with the one 4517, so the total pulse width inaccuracy will be twice that, or a max of +/- 15.6ms. This applies to the schematic posted below.

Cheers Chris

Reply to
Chris

--
OK, I\'ve posted a schematic to alt.binaries.schematics.electronic
under "Digital delay (from seb)" for you.

If you need a circuit description, ask and I\'ll write one up.
Reply to
John Fields

John Fields ha scritto:

It's exactly what I was looking for. I'll try it out as soon as I can find all the parts. Thank you!

No, the schematic is clear.

Reply to
zoidberg

If the one second delay never changed value you could use a number of circuits to gate the pulse.

One thought would be to re-trigger a one shot chip like the 74ls123 and use its output to gate or trigger the pulse (not a square wave).

It's simple and it works...

cheers, skipp

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: zoidberg wrote: : I need to delay a square wave (0-5V, 0.25Hz, duty cycle=12.5%) one : second. The only way I knew to delay a square wave was to use some NOT : gates, but it doesn't work with such a low frequency. Can you help me?

Reply to
Skipp says hello

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