# DAC specifications

• posted

Hello All,

I have chosen analog devices AD5532HS for my project. The main reason that I chose this DAC was because of its 32 voltage output channels. You can find the DAC at

My post is long and I request you to be patience and helpful. I need your help to understand and finalize the following issues

1. The data sheet says that the DAC has the update rate of 1.1MHz. So, the update rate for 32 channels will be (1.1M) / 32 =3D 34 KHz per channel. Am I right?

1. The output waveform at each channel should consist of 32 digital samples. The DAC requires 30MHz (33.3 nsec) of serial clock and 14 bit of data and 5 bit of address bits to chose the channel. So, the DAC requires 19 bit of data to update one of its 32 channel.

So, the total time required to input the 19 bits ( One Sample ) will be (19 x 33.3 nsec) + 280nsec =3D 913.27 nsec (1MHz), Am I right?

913.27nsec x 32 =3D 29.22usec or 34 KHz. What will be the total output rate of the DAC? (19 Mbps!!)

So, I send 19 bits of data 32 times to channel 0 to produce an analog voltage waveform consists of 32 samples and then send the 19 bit data to channel 1 and so on=85 Now,

a) How can I calculate the update delay rate between two consecutive channels and channel 0 and channel 31? b) What is the highest frequency waveform can I get from each channel of the DAC, if I am trying to update all of them?

1. I tried to calculate THD for this DAC using THD % =3D (1/ 2^n) x
100. I chose 14 bit, so THD =3D 0.006 %. What does this number really means. Is it good or bad? How can I interpret the result?

1. Dynamic Range =3D (6.02 x n) + 1.76 =3D 86.4. What does this number really means. Is it good or bad? How can I interpret the result? And what is dynamic range?

2. This DAC has an ideal step size of 5 / 2^14 =3D 300uV =3D 1 LSB. Now, the data sheet says that the offset error is 50mVolts, Does it mean
50mv =3D 49 bit error. Am I right? How can I convert the 50mV error into equivalent bit error? Is this error be permanent?

1. In order to calculate the accuracy of the DAC with my application, I chose that +/- 4 LSB errors is tolerable, so the accuracy came out to be

Accuracy =3D 14 =96 log2 (4) =3D 12 bits.

+/- 4 LSB =3D 0.0012 volts. Is this a right way to calculate the accuracy of the system? I meant that what if I chose the error to be +/- 2 LSB. How should I choose the allowable error for this DAC? How can I make the output comes out of this DAC as accurate as possible?

Regards, John

• posted

within 5%

no. 19 bits for channel 0, 19 bits for channel 1, and so on. repeat 32 times.

(19 x 33.3 nsec) + 280nsec ((19 x 33.3 nsec) + 280nsec) *31

nyquist says 0.5/ 29.22

In context, there's no other way.

loudest/quietest

semi-permanent I think. (slowly varying)

not sure.

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