Build a XOR with a MUX and a Invertor?

Hi Frank,

It's a interview problem and I just cannot answer it. Anyone give an answer will be appreciated!

Best regards, Davy

Yep. An XOR is just a 4-quadrant multiplier. And that architecture, in high speed circuits, has less glitch issues (if implemented with all inputs differential, as in ECL/PECL).

...Jim Thompson

Which is just a balanced modulator.

John

Or is it that the perpetually aggravated are confused?

John

Yep.

...Jim Thompson

Input A of MUX = S1 Input B of MUX = NOT S1 Input S of MUX = S2

Working out the Truth Table....

If S1 and S2 are 0, the MUX output is S1, which is 0

If S1 and S2 are 1, the MUX output is NOT S1, which is 0

If S1 is 1 and S2 is 0, the MUX output is S1, which is 1

If S1 is 0 and S2 is 1, the MUX output is NOT S1, which is 1

Do I get the job? :-)

Al

What percentage of your pay do we get for getting you this job?

Thanks, Rich

Well, I must be one of those "perpetually confused" then, because it was perfectly clear to me. ;-)

Thanks, Rich

An XOR on A and B is /A*B + A*/B using obvious notation. So you would for example use A to drive the MUX bit select , then route B to the MUX

. . . . MUX . +-----------+ . |\\ | | . +-| o---|1 | . | |/ | out|----> A XOR B . B -+-------|0 | . | sel | . +-----------+ . | . | . | . | . A --------------+ . . . . | . A B | OUT . ---------+----- . 0 0 | 0 . | . 0 1 | 1 . | . 1 0 | 1 . | . 1 1 | 0 . |

Not with that reasoning- better luck next time....

The early Actel FPGAs used a logic module based on the MUX structure:

"Davy" schreef in bericht news: snipped-for-privacy@g44g2000cwa.googlegroups.com...

There aren't that many ways how you can wire them together.

Try each possible way, and figure out the truth table, and compare that with an XOR truth table.

Good luck with your home work ;)

"Davy" schreef in bericht news: snipped-for-privacy@z14g2000cwz.googlegroups.com...

Well, there's your answer then -> "I cannot answer it".

"Fred Bloggs" wrote

MUX

I guess I'm just dense, but how is this different from Al's solution? Granted that you hooked it up a bit different than Al, but the outcome is the same AFAICT.

Fastest possible binary multiplier known:-) View in a fixed-width font such as Courier.

. . . MUX . +-----------+ . | | . B ---|1 | . | out|----> A x B . '0'---|0 | . | sel | . +-----------+ . | . A . . .

The MUX transfer function is OUT= SEL*IN1+/SEL*IN0, the XOR is OUT=A*/B+/A*B, the substitution is clear, in contrast to this gibberish: Input A of MUX = S1 Input B of MUX = NOT S1 Input S of MUX = S2 with which only the perpetually confused could not be aggravated.

The perpetually confused have no sense of comprehension and are therefore never aggravated.

What's so confusing about that?

Even if you didn't know what nomenclature I used, I don't think it's terribly hard to work out.

"Input A of MUX...Input B of MUX" implies I am calling the 2 inputs of the MUX A & B.

"If S1 is 1 and S2 is 0" implies that S1 and S2 are the inputs to the system.

"Input B of MUX = NOT S1 " implies that I am using the NOT gate to invert an input, and attach it to a MUX input.

Admittedly a picture would have been clearer, but it would have taken me longer to draw then it took me to solve the problem :-)

I didn't bother consciously making the substitution. I just mentally combined the parts in my head for twenty seconds until I found something that worked.

cheers,

Al