Why is my integrator circuit output spiking instead of smoothing out?

When you see a jittery triangular wave in an integrator simulation, especially with a square wave input, it is almost always related to the op-amp's ability to keep up with the rate of change. In the LM324, while it is a solid general-purpose chip, its slew rate might be limiting how fast the output can swing at the sharp corners of the square wave. You need to check the datasheet specs for the maximum slew rate and make sure the switching frequency of your square wave doesn't push the output into clipping prematurely. Clipping is what causes that messy, unstable look, even if the theoretical voltage limits aren't hit.

Another thing that messes up sim results like this is the simulation's numerical stability, particularly the time step settings. TINA or any other simulator needs to be able to resolve the instantaneous change of the current thru that large feedback resistor. If your time step is too large, the simulator simply can't model the smooth transition correctly, leading to those peak jitters. Try significantly decreasing the simulation time step til the triangular wave smooth out completly. That often solves the visual noise in the scope. Also, check the virtual power supply rails in your simulation enviornment. Even if the output isn't hitting the theoretical power supply limits, if the virtual rail voltage is set too close to the usable range of the LM324, the simulation will artificially introduce errors as the output tries to saturate. It sounds like you are running into a classic design bottleneck where the component choice doesn't match the required signal bandwidth. Focusing on increasing the slew rate margin or tightening the simulation step should get that clean curve you are looking for.

I've been wrestling with these types of sim glitches for years back in the day. Before you worry about the chips themselves, you gotta check the tolerance on that feedback resistor. If you're using a cheap 5 percent part, you will never get a perfectly smooth slope, and the simulation will act jittery trying to correct for that error. Try running the whole setup with a model of an older, less perfect op-amp, maybe an old 741, just to see if the mess changes. Sometimes the ideal components in the sim hide the real world imperfections that are messing with your results.

I don't think it's fair to just blame the op-amp's slew rate for every single simulation hiccup. While it might be a factor, you're running a simulation, and the TINA model of the LM324 might just be overly conservative. It can easily simulate a response that's less dynamic than the actual chip would show in a breadboard setup, especially when handling fast edge transitions.

My experiance has been that if the simulation is acting off even after tightening the time step, the issue often lies with the signal generation itself. Make sure you haven't got unexpected parasitic capacitance between your traces that's filtering the input signal before it even hits the op-amp. Sometimes that input square wave isn't as crisp as it looks in the schematic.

I have been looking at this for a while but I still don't totally get how the simulator handles the signal. I ran a diferent setup, doing an integrator with a differential input to see if that helped clear up the shape, but the issues persisted. coud the problem be that the simulation isn't acutally modeling the signal discretely? Like, maybe the input pulse itself isn't perfectly sharp in the software, wich makes the output look jumpy even if the op-amp is perfect. If I make the input rise time way slower, does that change the way the simulation models the noise?