Sure, but it is kind of abstract these days. We don't design with schematics any more. Heck, the compilers don't let us do some obvious things, or seem to know what we want better than we do.
Prop delay on-chip is usually dominated by resistance and capacitance. I *wish* I could use an FPGA whose speed was limited by c. Imagine 3 ps delay between input and output on adjacent balls.
You *can* design with schematics but it's usually a waste of time. The synthesis tools do the job if you know how to use them. Hell, you can use VHDL as a netlister, if you want.
There is a lot more to digital design than FPGAs.
I use a lot of ECL, SiGe stuff lately. "Discrete" logic. But none of the parts that I can buy have prop delays limited by c. Typically around 10x to 10,000x worse.
There is some 15 ps logic around, boutique stuff at hundreds of dollars per gate, and iffy suppliers. Eclips Plus and GigaComm are more rational, prop delays in the 200-300 ps sort of range, maybe $10 per gate.
Key words "that I can buy".
Now put a whole pile of those on one chip and forget the I/O between.
Perhaps not even there.
I heard a lecture today from Prof. Robert W. Boyd on impressing an image fr om an orthogonal basis set onto a single photon, then distinguishing betwee n the photons carrying the various possible encodings with a holographic ma tched filter.
He managed to transmit 2.1 bits worth of information per photon, and pointe d out the theoretical information content was infinite. He used seven possi ble states to shift his 2.1 bits, and pointed out that it would have taken a much lower-noise set-up to do better.
Not a result I'd have expected. The electromagnetic field corresponding to a single photon is a whole lot more complicated than I'd imagined.
Plank and Einstein pointed out that total energy of a single photon was fix ed, but they didn't say anything about how it might be structured.
Even the fatwire levels (i.e. top level metal) on logic chips have average propagation speeds around c/10 due to all the repeaters required. On-chip optics is partly a way to get round that problem.
Cheers
Phil Hobbs
Cool, that explains everything.
That analogy actually stinks. A better analogy is to picture the neuron as a dry wick from an alcohol burner. Take the wick out and fill the burner with alcohol. The alcohol represents a reservoir of sodium ions. Place one end of the wick into the alcohol in the burner. Notice how the alcohol moves up the dry wick. It's similar to how sodium diffuses into a neuron when it fires. It's a sort of peristaltic movement, which begins at one end and works its way to the opposite end.
Thank you,
And the repeaters are there because they're faster than the same length wire without them.
I assume you'll share a copy here? Can we edit it?
George H.
Yup. They slow down quadratically with length once skin effect becomes important. (showing this is an interesting math exercise.)
Cheers
Phil Hobbs
R and C both go up as a function of length, so RC goes up by the square (R dominates L).
Yes. I was actually thinking of the skin effect loss in LC lines, which is where the actual interesting math arises. but that's not the same as the chip wiring effect, you're right.
Cheers
Phil Hobbs
How could the number of bits of storage ever be greater than the number of bits in the frequency divider? I mean, the number of states is the number of states.
"Tom Del Rosso" wrote in message news:oai4tv$fcc$ snipped-for-privacy@dont-email.me...
Yes! The storage is in the divider, of course.
Tricky, because the division can be, ehh, kind of teeter-totter balanced on a low-gain spur from an XOR phase detector -- but, outside of those cases, in a classical VCO(-mult)-divider-PLL design, that is exactly it.
I wonder what I was thinking (was it XOR phase detection?), and if there was something cool there at all, or not... :)
Tim
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