What is the common strategy for RF simulation and measurement?
Feb 18, 2006 9 Replies
C
chientm
Hi all,
I am designing a integrated CMOS circuit at RF frequency and I am going to measure the circuit using wafer probing. I have to add GSG pad structures to the RF I/O pins so that I can probe the signal. But these pads will introduce additional parasitics that are going to degrade the performance (shift the matched frequency, etc) of my circuit.
Please tell me what the common strategy to deal with this problem. Should I match the circuit with the pad to 50 Ohm? Or should I match only the circuit (no pad) to 50 Ohm, then put the pad in during layout and de-embed the pad's parasitics during measurement?
Thanks a lot for your help.
Frank
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R
Robert
What frequency(s)?
How sensitive is the circuit?
Have you tried to add appropriate parasitics in simulation to see how much they affect your circuit?
You have to get on and off the chip (most likely) some way. Choosing how to do that is a part of the design.
Robert
F
Frank
Frequency: 60GHz
I will do on-wafer probing and all the components are required to be on-chip. If I add the pads to the simulation and keep the matching circuit unchanged, S11 and S22 reduce from -15dB to -8dB, I think.
F
Frank
Frequency: 60GHz
I will do on-wafer probing and all the components are required to be on-chip. If I add the pads to the simulation and keep the matching circuit unchanged, S11 and S22 reduce from -15dB to -8dB, I think.
F
Frank
My real problem is this: The pads are not part of my circuit (I am going to put my circuit into a larger one) but I have to put them in so that I can measure the circuit. Should I do impedance matching with the pad or without the pad? If I do not do matching with the pad, I might not be able to measure the circuit. But if I do matching with the pad, then how can I use the circuit later when there is no pad?
There should be some practical approaches to this problem but I do not know them because I haven't done any kind of RF measurement before.
Thanks,
Frank
R
Robert
60GHz is pretty high to be doing RF measurements for the first time.
How are you going to get that high a signal cleanly on to and off the chip? Going through "normal" wirebonds will kill you for that high a frequency. I've seen Alumina Microstrip lines leading to and away from the chip with wedge bonding a ribbon sized to match the line width's on each side but the transition still causes a discontinuity.
If you need to Wafer probe you don't have to put the pads on the final version and you don't have to impedance match for the pad structure. What you do have to do is understand the circuit well enough to see if what you get from probing the pads on chip is what you expect to get with the impedance matching you have working into the pads of a prototype. And if that is confirmed you can have more confidence the chip will work as expected without the pads in the final configuration.
If you aren't probing for production you may be able to put a smaller than usual pad for the center contact and by careful hand work bring a probe down to that center contact with normal ground pads on each side. I think you said a GSG type probe? Production won't let you get away with something like that but it may be workable in a prototype.
Are you using Coplanar Transmission lines or Microstrip? If the later I hope you have ground vias in the ground pads to each side if you can or as close as possible to them. Are you modeling the inductance of the vias as well as the pad's capacitance to predict what you'll measure?
Robert
R
RST Engineering (jw)
Amen, brother.
Jim
R
rqlhgl
Try to get some application notes from Cascade Microtech, you may have to make up dummy deviceless GSG padded calibration artifacts to enable TSR or TSD calibration of the NA. Dick
R
Robert
They have a calibration substrate with devices like that on there for calibrating GSG or other type of similar Probes out to the tips.
If the OP didn't really mean he had to Wafer Probe but just needed to evaluate a prototype circuit then I'd suggest doing as I said and embedding the Chip into a fixture with gold ribbons of the same width as the circuit lines wedge bonded from the microstrip lines on alumina going over to high performance microwave connectors. HP (IIRC) and other people make prototype fixtures like that.
Robert
F
Frank
Thanks, Robert.
I am going to do wafer brobing and my circuit is still a prototype. I am in the designing process and I want to measure the performance of the circuit.
It seems that I have to put the GSG pads in to do the probing. Adding dummy GSG pads to calibrate their effect on the circuit like Dick mentioned also makes sense.
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