Using FETs in parallel

Ah, yes. I suppose I'm not used to fets that conduct so little. Thank you for so politely pointing that out.

The last amp I did delivered +-50 volts into the load at 10 amps max. I used four TO-247 fets. If I'd used the laterals, I could have done it with 20.

The one before that was +-170 volts at 100 amps peak, using 32 clamp-mounted TO247s on copper heat spreaders. With some clever stacking, I could have done that with 400 of the lateral fets.

John

I have to say this is my favorite reply out of all. I am pretty sure I have never been called a "piss-ant pseudo-intellectual" before... at least not all at once!

Just for completeness, the four FETS have all three terminals connected in common. How else could you balance currents if the gates or sources are not separate?

But thank you all for your comments. I have learned a few things. I don't think I will be copying the "reference" design. I don't know what the specs of that design are and my requirements are likely different. I am going to try to do the job with a single pass transistor and may use a bipolar part. Because I don't want to use a voltage boost circuit, I will use a P-FET or a PNP transistor. I may not even have to make the clamp a linear circuit. The requirement is to work through a brief voltage surge up to 100 volts (sliding scale,

100 V for 50 msec to 36 V for 210 msec). Turns out we will have a hold up circuit on the output of the DC/DC which can last for 100 msec. I can stretch that out a bit more and cut the input if the voltage goes above 50 volts.

Looking at the converters I am evaluating, the VICOR is not rated above

36 V continuous and 50 V for 100 msec. This will require me to lower my clamp voltage to 36 V and boost the hold circuit to 210 msec. A unit from GAIA is good up to 80 V continuous and should let me meet all specs with a shorter hold circuit. But it is much more expensive.

When selecting a bipolar part vs. a FET, which will likely give me the lower voltage drop when saturated? Or is that like asking how long is a piece of string??? My understanding is that in saturation, a bipolar part has a fixed, low voltage. The FET acts like a resistor. So is it more like apples and oranges???

Thanks again for all the advice.

But why design around something that's uncommon, made by few vendors, is expensive, and has lower voltage, current, and power ratings than a similarly-sized vertical power fet?

John

Another update...

I just spoke with LTI and they have a switcher part that will handle inputs up to the full 100 volts!!! So I may not need an input clamp at all if I roll my own switcher.

The 2005 version is at:

Also, this is the electrical specs manual:

(But notice the last part of the filename -- is this a Japanese hearing of the word, characteristics? Or just a random misspelling?)

In any case, that last manual discusses the vertical vs lateral structures a little bit:

We would like to summarize the above, as follows.

(1) In the case of low voltage gain, the cut-off frequencies of the vertical and the lateral structures show the same level. The input impedance ratio at fC depends on Rg ratio, so the impedance of the vertical structure is 1.5 to 2 times lower than that of the lateral structure.

(2) In the case of high gain amplifier circuits, the frequency characteristics of the lateral structure and better than that of the vertical structure, because in the vertical structure the feedback capacitance (Cgd) has a great influence.

They also add elsewhere:

In the lateral structure, Cgd is much smaller than Cgs and Cds, so it can be neglected. The time constants are given by the following equations: Ti = Rg ? Cin = Rg ? Cgs To = RL ? Cout = Rg ? Cds Ti : input time constant To : output time constant

In the vertical structure, the feedback capacitance (Cgd) is large and depends largely on the drain voltage, so the operation analysis will be more complicated.

Jon

"Sjouke Burry"

** That is quite wrong for the vast majority of MOSFETS.

There is a strong *positive* tempco for Id with typical switching fets operated in linear mode. At a few amps, the Id tempco becomes zero and only above that current finally becomes negative.

See:

The transfer characteristic data for the MTP33N10E ( 100 volt, 33 amp, Nch ) shows the behaviour - in this example zero tempco ( where all three curves all meet) is reached at an Id of 20 amps !!

When used in linear mode - such a high Id would not likely be reached without exceeding the practical power dissipation limit first.

Operating MOSFETS with a strong positive tempco in parallel *in linear mode* requires close matching of the gate threshold voltages and use of source ballast resistors to ensure good current sharing.

Another class of MOSFETS called "laterals" reach zero tempco of Id at much lower currents, ie 100 to 200mA.

......... Phil

"John Larkin" "Phil Allison"

** What are you referring to - John ?

Lateral MOSFETS do not have

" gate threshold voltages .... all over the place. "

......... Phil

"Phil Allison" a écrit dans le message de news: snipped-for-privacy@individual.net...

Don't know if it's the case here, but it happens that manufacturer redesign their parts to accomodate new manufacturing processes, or whatever and keep the partnumber because the base characteristics given in the datasheet are the same. I guess almost every body got burnt one day or another. Making the manufacturer admit this may require some efforts.

--
Thanks,
Fred.

Yeah, what's your point? Do you normally spend this much time with a "piss-ant pseudo-intellectual"? Why are you here? Why are you anywhere???

"John Larkin"

** Then you posted that remark in the WRONG place !!

PLUS - I had already covered it in my post:

" Operating MOSFETS with a strong positive tempco in parallel *in linear mode* requires close matching of the gate threshold voltages and use of source ballast resistors to ensure good current sharing. "

** Must be - plus the turn on knee is very much more gradual than for switching MOSFETS. ** Not at all IME.

A 100mS long one shot allows almost 200 watts dissipation.

If the chip overheats - it merely goes temporarily limp and does NOT fail.

What are you comparing it to ?

** Never seen anything like that range in actual practice . ** You need to learn to read graphs more carefully.

The zero tempco point is at 110mA and 0.6 volts Vgs.

....... love, Phil

Actually, no, but for thermal/heatsinking reasons. Heatsinks cost a lot more than power mosfets, so it pays to overkill on the silicon.

I'm using 400 volt, 300 watt parts: IRs for the n-channels, IXYS for the p's.

"For the audio market." Golden-ear semiconductors. I think these are an ancient metal-gate diffused process.

That is hard to believe. If you apply said 250 volts, and crank up the gate voltage to get, say, 16 amps, and sit back and wait, the fet will current-limit at a safe level?

Should I send back the (calculates furiously) $12 million?

John

With plenty of gate drive volts, the laterals are just fine. They'll deliver plenty of amps. The on-resistance ( when they're saturated ) is higher than vertical types though.

Graham

Two overstatements of admittedly valuable properties.

Ahem, how does that get you 340V, plus a safety margin?

An amazing disconnect, 250V vs 400V. Doesn't compute.

--
 Thanks,
    - Win

Looking at the referenced part (the Farnell link) it hits 150 Tj at rated power (25 c case, 1 k/w thermal resistance, 125 watts.) So if it self-protects, the transconductance must drop like a rock past 150C, and the transfer curves don't suggest that. Of course, the transconductance is very low, so if one limits the available gate voltage, it will self-protect; as any mosfet would.

There *is* a safe operating area curve, and an abs max power rating.

Does anybody else use these parts?

Jim, might there be a sudden Gm dropoff mechanism at 175C that self-protects these parts?

Who the hell is MagnaTec?

John

Sigh ... yet another thread lost to the bitbucket because people refuse to ignore the f****ng obvious troll...

Tim

-- Deep Fryer: a very philosophical monk. Website:

Because they current share well and match for Vgs when operated linearly.

Graham

Unless it is a precision analog instrumentation circuit, precise current sharing it is not necessary, it is only necessary that worst-case is not exceeded. You still have not linked us to this "reference design."

It's anyone's guess what you're talking about. You need to figure out a way to give a full and complete description without using so many words. No one is going to waste half a day trying to decipher your gibberish. Your post fails on both counts.

** Tell me Win -

when a semi maker amends or improves the published data for some long manufactured device, does that have a retrospective effect on real devices already out in the field ??

I'd be bloody amazed if it did.

........ Phil

"Fred Bartoli"

** Did anyone see which way that SCUD missile went ??.

......... Phil