Dear Joel, thanks for your considerations: you are right, the channel synchronization is VERY difficult...I approached this problem in this way:
1=2E I distribute the clock signal (20MHz) from the first scope board (channel 1 and 2) to my second board (channel 3 and 4). The clock goes only to fpga (then the fpga distribute them to the A/Dcs), and for this the capacitive loading on this wire is quite low. 2=2E I have a bidirectional wire, the trigger, that comes from first board to the second if the trigger is on channel 1 or 2 or from the second board to the first if the trigger is on channel 3 or 4 (this is set by the applicative program). The trigger is a "normal" signal synchronous with the 20MHz clock signal: this will generate the sweeps with exactly the same start point and the same end point (referred to the 20MHz clock cycle). 3=2E The equivalent time sampling will be rebuilt after this phase, calculating with interpolation the trigger instant on a sub-cycle basis (interpolation) and shifting the overall waveform of this fractional value. For this the waveforms from the different boards needs to be synchronized at the clock cycle and not at higher frequency.Finally, this scope has not very high features but from my point of view is quite cheap (about 100=80 for components) and easy to use (powered by USB only). Another very important point (always from my point of view) is the "teaching" peculiarity of this instrument: you can change the DSO firmware (FPGA) directly from the USB with no programmers or other things, only Quartus and a USB cable.
hi,
Davide