Universal Parallel Bus -- why not?

It is still bidirectional, even if you have to write a '1' to the port to receive. That's not a whole lot different than programming a UC GPIO port to IN/OUT.

...but the '244 around it was the other half.

Not really, it aggregates packets over the lanes, more like store and = forward. Nor do the packets on any lane have to be related to the packets of any = other lane.

parallel=20

out=20

=20

Bidirectional=20

implementation,=20

isn't true=20

=20

it

Adapter.=20

What documentation i can find of the original IBM hardware shows this to = be true. However many "clone" cards omitted the input possibility thus saving a = part or two. Nor was the bidirectionality all that good, to get input on those pins = writing "FF"=20 before hand was necessary (the ls374 output enable pin was hardwired).

true.

two.

"FF"

Again, that's not much different than most UC's bidirectional GPIO ports. It

*is* bidirectional.

How about one fiboroptic bus with photonic logic processor made out of etched glass? I like the UPB idea, but I think the future of computing will be computers that contain optics and LED's.

Optics, yes. Sure and hell NOT parallel bus unless one manages to wavelength multiplex 8, 16 or 32 channels. LEDs? are they not a bit slow?

One problem with high speed parallel connections is the need to keep the path lengths exactly the same for each connection to be able to direct sample full words. At high speeds, you need to use some self clocking on each wire and after clock skew elimination to build a full word.

The device complexity is similar as multiple serial connections bundled together. You could as well send serially all bits of a word on one wire, the nest word on the next wire etc.

CWDM would be attractive, but would need lasers.

What is the propagation spread on different wavelengths for different fiber types ? Would it be possible to sample each wavelength in parallel or would some self clocking signal be needed for each lamda ?

The spectral purity would be an issue even for 2-4 lamda CWDM.

• Which are a bit faster than LEDs and so a better match to this concept.

• a definite problem; a dumb solution is to have each channel "clocked" at slow rate commensurate to guarantee clean recovery in all channels.

• Self-clocking is possible for each channel, but the slowest one will limit the overall data rate.

• Well so far, this is just an idea, sort-of sci-fi. Does not mean not possible or not practical.

>

Even if the path lengths are exactly the same there is dispersion to deal with. The propagation velocity is frequency dependent, so data- dependent timing errors creep in.

Long ago I was involved in transmitting digital TV signals around a building. To cut costs the designer tried using twisted pair telephone wire with one bit per pair plus a clock pair. It was impossible to get reliable operation at 50m range because of dispersion no matter how much tweaking of timing delays was done.

John

This is a well known phenomenon.

While working with (physically) big computers in the 1970's in which

1/2 inch 9 track (8 data bits+(odd)parity was used). The 800 BPI (bits per inch) drives were quite unreliable.

The assumption was that odd parity with 8 data bits would generate a clean synch for all tracks.

Depending on the read head azimuth angle, this was seldom the case.

In reality, you had to manually adust the azimuth angle for each tape written on a separate drive.

The 1600 BPI tapes were much better due to the chancel specific self clocking encoding.

Which gives a good lesson of what not to do and what to look for. So a UPB needs a relatively low dispersion data path and a clock rate that is limited by frequency dependent issues. If speed is of the essense, use of different wavelengths for each channel would most likely limit total path length to an "impractical" amount (ie design cost not worth t). Still, a CPU board using light instead of wires/traces could be designed that would "kick ass" for parallel, multi-processing.

All you need do is run your parallel lines as several serial lines in parallel. Low cost is what rules now though.

NT

That's what gigabit Ethernet does (1000baseT) with its four pairs. It qualifies as low cost after you amortize the (relatively complex) design of the dedicated ASIC hardware. The best way to do a fast parallel port nowadays might be to bond a multiplicity of gigabit wired Ethernet ports (but the switch fabric requires multiport Ethernet switches to do some nonstandard things to make a one-to-many node).

Outside of a server room, does anyone really have a need for such? There were four-bytes-at-a-time SCSI parallel ports, but not a lot of use for them.

Uncompressed video sucks up a lot of bandwidth.

On 2016-12-06 00:01, Robert Baer wrote: [...]

Why? What advantage do you imagine that might have?

Jeroen Belleman

sounde like a poor immitation of 16x PCIe.

every gamer.

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This email has not been checked by half-arsed antivirus software

SFPs

are available up to at least 10 GBit/s (SFB+) so you get a decent throughput with a single fiber.

OTOH, CWDM SFPs are available with different wavelengths (every 20 nm), so you can put 8 lamdas into a single fiber with simple passive combiners and splitters. Unfortunately the SFP is quite big, if you want to put 8 of these into the edge of the PCB.

If you are building something similar to the Connection Machines Hypercube computer, using CAT6 cabling would quickly consumes most of the cube module volume.

Using fiber optic cables with multiple fibers and using WDM on each fiber will have a huge throughput for a specific cable volume. It might even make possible direct connection between any two nodes in the cube.

Most massively parallel computers have direct connection to only a few nearby nodes in each dimension and relying on mesh networking further away. This greatly increases latency, when latency prone serializing/deserialisation is applied in each hop.

Getting to any node with a single pair of desers would speed up things greatly.