Triac protection against spurious turn on

Do what I did. Read a lot of application notes.

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In the STMicro app note above, they say.

"An RC snubber circuit must be used when there is a risk of TRIAC spurious triggering, i.e. when the dI/dtOFF - dV/dtOFF couple, measured in the application, is higher than the TRIAC datasheet values, (dI/dt)c at a given (dV/dt)c."

Which sounds simple enough, but you don't know what the specs of the killer pulse is. So increase the dv/dt spec of your triac and design your snubber network to roll off pulses above that. Then life test it preferably in an oven.

Reply to
Wanderer<dont
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Hi

I have a triac control circuit in which I supply gate current all the time to avoid zero crossing noise.

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Apparently, sometimes the circuit spontaneously turns on the triac. It's probable due to a transient, high dV/dt, turning on via "rate of rise of offstate voltage" limits.

The triac used is BT137S-600:

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I am using a snubber to divert energy, and also have a pulldown of 1kohm to shunt energy transients that capacitively couple into the gate.

The unit is at the client, so have not measured on it yet, so trying to guess what I should try to remove the problem.

I could:

Do a more hard snubber Reduce the shunt resistor Get a better triac Add an inductor in series to limit the transient

One thing I though of, since I turn it on all the time, and it is not very critical that the timing is perfect in terms of turning it on in the zero crossing, was to add a big capacitor on the gate in parallel with shunt resistor R543. That will act as low impedance for high speed transients.

Good idea, or better ideas?

Cheers

Klaus

Reply to
Klaus Kragelund

It's a sensitive-gate triac. R542 and 543 look big to me. They could be smaller and bypassed.

Reply to
John Larkin

I have read a lot of application notes too. They seldom list alternative ideas from just using a snubber, which I already have. So guess first off, make the snubber bad ass :-)

Reply to
Klaus Kragelund

Yes, it's all the way down to 5mA for trigger. I agree that R543 could be smaller and that beta times R542 is not super small.

I could add a NPN for the turn-off state, so it would be 2 emitter followers (NPN/PNP) driving the gate with a order of magnitude smaller resistors.

Reply to
Klaus Kragelund

I doubt that would make any difference.

Reply to
John Larkin

Sometimes. Probably not here.

I wonder how far from the triac the opto is.

Reply to
John Larkin

It's not just the gate you have to worry about, there's dV/dt sensitivity on the main terminals of a triac as well. Inductive pickup from the wires is a good candidate when there is spurious triggering happening... dressing the internal wiring to the gate isn't all that should be a concern.

Reply to
whit3rd

The opto is just next to the Triac, and with a good ground plane, so no twisting of the gate traces needed,

The combination of the voltage rate of rise and the capacitance from M1/M2 to the gate is what triggers it, right?

So just adding a capacitor on the gate would be a good way to protect against noise, right?

Reply to
Klaus Vestergaard Kragelund

Yeah, you mean the leakage from the snubber when the triac is turned off?

Reply to
Klaus Vestergaard Kragelund

Some triacs need 150 mA and 1.5 volts to trigger. Some have low ohmic paths from gate to MT1, which helps reduce sprious triggering.

I'd bypass the gate and the optocoupler receiver. Either could be triggered by a bit of capacitively-coupled noise.

As suggested, R542 and R543 could be smaller, both bypassed by as much c as is compatible with your speed requirements.

Reply to
John Larkin

Agreed, and thanks for the suggestions. Will try it out :-)

Reply to
Klaus Vestergaard Kragelund

Yes, I'd put a capacitor across R543. At a guess 0.1uF a good first try, maybe even upto 0.47uF. R543 at 1k is far too high and maybe not even necessary since a lot of triacs that size have on-die resistors gate-MT1

- you could measure one.

Is there a special reason the triac side supply is negative ground? That triac is capable of positive gate triggering but is much less sensitive. I almost always have the logic supply positive ground triac side so the gate is driven from the -3.3 or -5V.

piglet

Reply to
piglet

The switch U1 is a simulation device to turn the external power source on at 5ms (so peak of a 50Hz mains cycle).

That is done to see how a large dV/dt can affect the system (if that is, the simulation model of the Triac supports M2-Gate capacitive coupling modelling.

Reply to
Klaus Vestergaard Kragelund

The changes was implemented, and now the spurious triggering is gone :-)

I still need to be sure that I have sufficient robustness, so it doesn't creep up again...

Reply to
Klaus Kragelund

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