The DLL clock buffers in the newer Xilinx FPGAs can be programmed for negative propagation delay! Now if I just build a long shift register, and run the stock ticker data through...
John
The DLL clock buffers in the newer Xilinx FPGAs can be programmed for negative propagation delay! Now if I just build a long shift register, and run the stock ticker data through...
John
That's precisely the thing that made Matthew Orman think he had FTL propagation...
Jeroen Belleman
Sure. The clock carries no information so it can go FTL. ;-)
....been done. There was an interesting insider attack on the horse racing pari-mutual industry too. They only got caught because they were a little too greedy and (un)lucky (several long-shots came in).
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