The Wire Crossing a Toroid Winding Technique for Lowering Parallel Capacitance

I'm aware of winding spacing and gap between first and last loops to reduce toroid interwinding capacitance.

Then there's the winding technique where 1/2 the toroid is wound, then the wire is pulled across the toroid to the beginning...and then the windings resume. (one layer)

Normally with a continuous winding, the first and last loops meet and this can be a heavy capacitance point due the Vdiff.

With the 'wire over the toroid' winding technique, 2 points of greatest Vdiff are created. Each point with 1/2 the Vdiff compared to the continuous winding.

I recall a while ago somebody posted that the 'wire over the toroid' technique can significantly lower inductor parallel capacitance.

I'm scratching my head on:

1) Does that 'wire over the toroid' have a name? 2) How does the 'wire over the toroid' technique reduce capacitance?? Is it the 2 points with 1/2 the Vdiff compared to normal winding? Is it that the electric field gradient shape has changed from 'O' to more like an '8'??

D from BC

Reply to
D from BC
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The effect you described is due to the reduction of dv/dt. Any winding technique that lowers the dv/dt between adjacent turns and/or increases the spacing between high dv/dt turns will reduce parasitic capacitance. Incidentally, the same techniques reduce insulation requirements for hv inductors and transformer windings. You'll find many such techniques in the literature, among them, bootlace winding, progressive winding. The other benefit of your mid-winding crossover is cancellation of the undesirable magnetic field associated with the progression of turns around the toroid. Paul Mathews

Reply to
Paul Mathews

I've never heard of the 'wire over toroid' technique, so I don't know if it has a name.

The reason it reduces the parallel capacitance is that "parallel capacitance" is a lumped approximation to the real capacitances around an inductor (which run from every loop of the winding to ground and to every other loop).

The lump capacitance treats the capacitative current running through the inductor (actually around it) as if it is charging up a single capacitor strung between the terminals of the inductor. It is representing the sum of a lot of quasi-series connected larger capacitances associated with successive turns around the winding.

Any point on the windings where there's a big voltage difference over a small gap contributes generously to the lumped parallel capacitance. The wire over toroid technique halves the worst case voltage difference.

Rayner and Kibble's "Coaxial AC Bridges" (ISBN 0-85274-389-0) does talk about this a little in section 4.2.1 on the design of transformer windings where they describe a two-layer "astatic" (no external magnetic field) winding technique for a toroid where the winding goes half way around the toroid as a single layer, then goes back around the toroid as a second layer until it gets to the start and then continuues to go back around the toroid as a single layer until it gets to the earlier winding, where it reverses and goes back almost to the start as a second layer.

They don't give this technique a specific name, but they do identifiy it as a technique which gives a relatively low self-capacitance.

-- Bill Sloman, Nijmegen

Reply to
bill.sloman

ive only heard that the best way to reduce capacitance is to wind in rings so that you wind several layers in one section, then move on and then leave a gap between start/finish. this is analogus to the best way to wind non torid inductors.

ie the complete oposite to winding a neat layer going all the way round then continuing over the top of that layer with the next layer.

I think this is refered to as random winding by some manafacturers.

if you have no gap between start/finish what you describe may well reduce capacitance a bit.

Colin =^.^=

Reply to
colin

Don't know the name, but, assuming the gap between start and finish in the first case is the same size as the two gaps in the second case, I think I can reason out something less than a 50% improvement in total parallel capacitance. From a stored energy (in the capacitance) perspective, cutting the voltage across those gaps by half, decreases the energy stored by a factor of 4. But to get this, you end up storing that quarter two places, so half the total energy. But the energy across those gaps is only part of the total capacitive energy stored in total, since each turn stores capacitive energy in its capacitance to each adjacent turn. So cutting the end storage by half must cut the total capacitive storage by less than half.

Reply to
John Popelish

This is what sprang to my mind too. A single-layer toroid is N turns wound toroidally plus one turn wound solenoidally, and the solenoidal field produces stray coupling. Switching over halfway would help this, at least at long distances where the solenoidal fields would nearly cancel.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

I didn't quite get that last part..' cancellation of the undesirable mag..' . Does this mean the mid-winding crossover toroid (what I'm calling a 'wire over toroid' winding technique) has a different inductance than a normally wound toroid with the same amount of turns?

D from BC

Reply to
D from BC

John's simplified models fit well with improvements in Self Resonant Frequency that I've observed on many occasions. It's not unusual to see SRF rise by a factor of 4 or more when you modify the winding technique. I could hardly believe the improvement the first time I tried it. Note that the crossover turn can also be implemented on the circuit board if you split the winding into 2 parts. It can get a little tricky documenting how to do the winding properly in that case, since there are a couple of ways to get it wrong. Another case worth mentioning: I had to increase the turns on a PFC inductor past the point where all turns would fit on a single layer. I split the turns into 2 windings, each of them covering 160 degrees of the toroid with the first N/3 turns and winding the next N/6 turns back over 80 degrees. This put 2 winding ends diametrically opposite each other across the toroid. The 2 windings were then connected on the PCB using the crossover connection. Overall connection to the PFC-boost converter was such that the greatest potential differences were again across the entire toroid diameter. The resulting inductor had a higher SRF than the lower turns-count single-layer inductor it replaced. The rule, overall, is to maximize the distances between elements with high relative dv/dt. Paul Mathews

Reply to
Paul Mathews

Yup... that's what I'm thinking about..

The route that the spiral follows around the toroid produces an electric field.

+-->>>----+ | | | | | | +----+ +--+ | | A B

Between point A and all around to point B exists an electric gradient. Kinda like the voltage gradient off a rheostat.

Compare to the electric gradient shape using the mid-winding crossover technique ('wire over the toroid').

B | +--->>--+ +-------+ | | | | a | | | | +----+ +-->>-----+ | A

'a' is that wire that goes over (across) the toroid core.

This is going to have a different electric field pattern..and I'm wondering if this is what lowers the Cp of the toroid. D from BC

Reply to
D from BC

Isn't that the RF choke winding technique?? I've yet to see a toroid wound that way... It's like a row of stacks. Each stack is composed of cross crossing windings to form layers. Found example

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About random winding.. One time I took apart a 50W smps block (smps). I was surprised to see how sloppy the toroid was wound. Maybe is was a deliberate effort to reduce Cp.

D from BC

Reply to
D from BC

yes, I gues its impractical to get the neat rings, like you see there, but the aim is the same, I think the random technique just simply built up the layers in one spot before moving on, obviously its not going to be neat, but its also possible to wind it un neatly in any other way too lol.

ofc this doesnt realy apply to single layer wich I just noticed you mentioned.

Colin =^.^=

Reply to
colin

example

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I can guarantee you that an organized and designed winding technique will produce a higher SRF. However, there is also an organized winding technique that produces the worst result, so random ought to fall in between. Paul mathews

Reply to
Paul Mathews

See the Phill Hobbs or Bill Sloman posts for further explanation on the 'extra turn' around the perimeter of a single-layer toroid. Paul M

Reply to
Paul Mathews

Ahhh..I think it was one of your posts some time ago where I first learned about splitting the toroid into 2 windings.. (what I'm calling the 'wire over the toroid' technique....It's the toroid with no name...Damn... now I have that Neil Young.. Horse with no Name song in my head. ) Anyways...

Wow... certainly goes to show how much of a payoff it is to put more thought into the winding technique.. The off the shelf toroid inductors that I see often just have plain single layer fill or spaced windings...Nothing fancy..

I'm going to do some winding experiments and test them out.

Thanks...

D from BC

Reply to
D from BC

Well, it does not make any difference where 2 wires come from, how they are energized or even if they might be connected somehow elsewhere. Two wires of a given length and spacing will have a given capacitance (in that region) that can be easily calculated.

Reply to
Robert Baer

True, but it misses the point, which is, in the case of a length of wire arranged to create inductance, the details of how you organize the turns matter greatly. Paul Mathews

Reply to
Paul Mathews

while that is in fact true, its effect on the total capacitance depends on the turns ratio^2.

capacitance between adjacent turns has much less effect than from the capacitance betweem turns at each end.

capacitance between the 'center tap' and either end has 1/4 the effect as that from end to end.

Colin =^.^=

Reply to
colin

Just a side note from a hobbyist. I am learning from this discussion. The experiences were just enough beyond my own to push me into trying to think more closely but not so far away that I couldn't manage to acquire something out of it. This happens once in a while, here. Thanks to everyone for their cuts at it and to Paul Mathews for taking the time to provide frequent slices at the question, even if just a rebuff at times to certain points.

Jon

Reply to
Jonathan Kirwan

Ahhh...

Ok...I think I got this now....

Cp comes from the sum of interwinding capacitance, stray and terminals too. The interwinding behavior can be modeled as a LC array... There can also be a LC array to a ground plane.. Cp is an extraction from those arrays.

Since Cp is derived from an LC array..wouldn't that make Cp voltage and frequency dependant?

So..the higher the voltage ..the higher the Cp??

Now... for a fully wound toroid where the 1st loop meets the last loop...Does that meeting point capacitance vary with voltage? I don't think it should.. This part is structurally close to an ideal capacitor of which does not vary depending on the voltage magnitude.

D from BC

Reply to
D from BC

Except that, unless the stray capacitance is directly across the ends of the windings, it does not see the full inductor voltage.

Okay.

Sorry, no. What varies is the fraction of the total terminal voltage that appears across parts of the total capacitance. The capacitances between adjacent turns are all in series from terminal to terminal. So the their effective contribution is the one turn capacitance divided by the number of turns. This is just the effect of putting a lot of capacitors in series.

No. The higher fraction of the terminal voltage appearing across some part of the total capacitance, the larger fraction of that capacitance that appears across the terminals. If 10 capacitances are in series terminal to terminal, then each of those parts will see 1/10th of the total terminal voltage, and the effect will be that the terminals will be loaded with 1/10th of the capacitance of each of those parts.

This is the same way a divide by 10 oscilloscope probe lowers the probe capacitance compared to the scope input jack capacitance. It adds a capacitor in series with the jack that lowers the fraction of the signal voltage that appears at the jack.

Me too.

Forget varying capacitances and think an array of series and parallel, small capacitors, representing the various ways that the terminal voltage is divided up between various conducting surfaces making up the winding.

By the way, have you figured out the ultimate extension of the capacitance lowering trick you introduced at the beginning of this thread. (Hint: you can cross to the other side of the core more than once.)

Reply to
John Popelish

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