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switcher LC output filter problem

Driving an LC network as so to generate a sine:

I'd like to calculate some values that make a nice sine into the grounded load but also minimize the loss in the switches driving the filter.

I'm not sure this is the topology I want or how to go about picking those values in this situation.

Version 4 SHEET 1 940 680 WIRE 160 0 48 0 WIRE 256 0 160 0 WIRE 432 0 336 0 WIRE 656 0 512 0 WIRE 48 96 48 0 WIRE 48 224 48 176 WIRE 176 384 48 384 WIRE 256 384 176 384 WIRE 432 384 336 384 WIRE 656 384 656 0 WIRE 656 384 512 384 WIRE 832 384 656 384 WIRE 832 496 832 384 WIRE 48 512 48 384 WIRE 656 512 656 384 WIRE 656 528 656 512 WIRE 656 624 656 576 WIRE 832 624 832 576 WIRE 48 640 48 592 FLAG 48 224 0 FLAG 48 640 0 FLAG 656 624 0 FLAG 832 624 0 FLAG 160 0 V1 IOPIN 160 0 Out FLAG 176 384 V2 IOPIN 176 384 Out FLAG 832 384 OUT IOPIN 832 384 Out SYMBOL voltage 48 80 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(12 -25 0 1n 1n 16.66n 50n) SYMBOL voltage 48 496 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(-12 25 25n 1n 1n 16.66n 50n) SYMBOL ind2 352 368 R90 WINDOW 0 4 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L1

SYMBOL ind2 240 16 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 4 56 VBottom 2 SYMATTR InstName L2

SYMBOL cap 640 512 R0 SYMATTR InstName C1 SYMATTR Value 1n SYMBOL res 816 480 R0 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL res 528 -16 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 0.05 SYMBOL res 528 368 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 0.05 TEXT -130 296 Left 2 !.tran 1m TEXT 240 232 Left 2 !K L1 L2 0.95 TEXT 192 272 Left 2 !.ic I(L1) = 0 I(L2) = 0

Reply to
bitrex
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You could filter a single square wave and save a bunch of active parts. Classic bandpass filter, series LC and then a parallel LC maybe. Maybe notch the 3rd harmonic if you want a super-good sine.

What frequency range do you need? Single frequency?

We had to do that recently to generate a goofy-frequency high voltage sine to test our capacitive fuel level simulator. Square wave into a couple of Ls and Cs.

Here's our box.

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It needed about 15 volts RMS at around 20 KHz for testing. We tried and rejected, or blew up, several commercial RF amp modules.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I'm doing 3-5 MHz at 50-100V P2P, depending.

With the four-banger switching arrangement shown even with dead-time, fast FETs with low gate charge and reverse transfer C I'm having trouble getting the power dissipation on the higher-voltage FETs below about

500mW in simulation, for ~6 watts output. Meh....

The LC clearly has influence on what kind of loss there'll be in the switches but IDK how to optimize it.

Reply to
bitrex

I think I need to look more carefully at the gate drive waveforms, something's not snapping off fast enough.

Reply to
bitrex

How about brute-force RF technology, a mostly linear mosfet driving a tunable tank? You can get voltage gain from the passives, too.

Or wideband, one biggish linear fet, inductor, 60 volt supply.

You could make a 100v p-p square wave and lowpass filter. Fet switching losses could be nasty up there, so SiC or GaN would be nice, but more work.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

OK, I Stopped. Thinked, and think I figured out my issue. The LC I've shown will work pretty much OK. The high dissipation problem was with the gate drivers. With all four switches being N-fets and four isolated driver ICs, two switching nodes and four supply rails have to think carefully about how the gate driver rails are connected on the secondary side.

The top driver clearly has to be boost diode and cap to drive above the most positive rail, and then the other three are your choice. Get it wrong and it may work..sort of.

Reply to
bitrex

Client is hoping for more fine-grained control over the output frequency, I'm driving this switcher digitally from i2c/clock oscillator.

I believe I figured out the issue - bad gate driver rail choice. Have to be careful about where one derives the boost voltages from when you have all N-fets and four rails. I'll post a diagram momentarily

Reply to
bitrex

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