Static sensitivity and the PIC MCLR pin

I've designed & built a device using a 16F877A PIC, and have had a few issues with the device resetting or locking up due to static sensitivity. I think I've got to the point where it's working acceptably well, but I'd be very interested in anybody else's opinions on the issues I've faced.

The device itself is essentially the 16F877A driving a couple of stepper motors via darlington transistors, a couple of LEDs and some control buttons. There is another input to the PIC via an optocoupler, the input itself isolated via the opto and a DC-DC converter. The electronics are contained in an earthed steel enclosure and the 0v rail is connected directly to earth, the connection being at the PSU end.

The first problem I faced was that the PIC would frequently lock up when either the case or any part of the 0v rail was touched. I realised this was due to a mild static charge building up when I got up off a chair and being discharged through whichever point was touched. The PIC would crash and would draw then excessive current from the 5V supply. Investigations found the solution to this particular type of crash was to pull the MCLR up to Vdd via a 4k7 resistor and not have it connected directly to the 5v (as the Microchip datasheet suggests is acceptable).

The PIC would now not lock up as before but would still perform a reset if earth was touched when slightly charged up. It would also, as it happens, do the same when part of the isolated circuit was touched.

The solution I found to make the circuit acceptably resilient to the cause of the problem was to remove a 100nf ceramic decoupling capacitor I'd connected between MCLR and ground as part of my investigations into the cause of the first lock-up. The use of a decoupling capacitor on the MCLR is not uncommon it would seem, but not always used.

While not perfect, the device is now at least reliable enough for use. It does however raise the question in my mind as to what the ideal circuit arrangement is for the reset circuit, to make the device as resilient as possible? I note you can charge yourself up with static and give the metal case of your PC a pretty severe zap without any ill effects.

--
Steve H
Reply to
Steve H
Loading thread data ...

Apparently the ESD current is flowing through your board. That could result in all sorts of peculiar effects. Fix the board layout and/or rethink the connection of grounds and cables.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

formatting link

Steve H wrote:

Reply to
Vladimir Vassilevsky

I have had similar effects with driving steppers, with a different processor. In my case ESM made it via the wires to the steppers. Use transzorbs on each outgoing and ingoing connection,. Those transzorbs will have to be grounded at the right points, probably the metal casing. Layout of wires is also very important as Vladimir points out.

Reply to
Jan Panteltje

For digital signals, and if you don't need it lightning fast, you can use a resistor and a BAV99:

formatting link

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

If I understand correctly, your electronics and the box it sits in each have their own individual wire to a common ground at some remote PSU?

That's bad!

The box should *be* the electronics ground. In the setup you have, discharging static through either the box or the electronics ground will make the potential of one jump w.r.t. the other, causing all sorts of mayhem.

Any wire going through the wall of the box should be filtered and protected against excessive voltages, ideally right at the point where it penetrates.

Jeroen Belleman

Reply to
Jeroen Belleman

The arrangement I have is that the enclosure has the mains supply going directly into it via an IEC connector. The steel enclosure is directly earthed by a short wire from the earth pin of this connector to an earthing point on the chassis. An off-the-shelf 15 volt 120 watt power supply sits inside the enclosure. The 0v side of the DC output is connected to earth internally within the power supply.

--
Steve H
Reply to
Steve H

OK, that doesn't sound so bad then. Attention shifts to the other wires: I suppose there's a reset button mounted in a hole of the enclosure somewhere. Do you have a GND wire from that button back to the board, near the connection to the MCLR pin? The idea being to minimize the loop area of the current path from MCLR, through the button, back to GND. Don't rely on the box being at GND potential to pull MCLR down!

Next is the opto-isolated part, which also crashed the controller, when touched: How much of that part of the circuit is exposed inside the box? Is there anything to keep the potential of the isolated part in check? Does it get close to any part of the controller circuitry? Possibly you have capacitive coupling or maybe even a flash-over from that part? A few kV finds ways that a few volts cannot bridge.

Jeroen Belleman

Reply to
Jeroen Belleman

In message , Jeroen Belleman writes

No, in this apparatus there's no reset button, purely a 4k7 pulling the MCLR to the 5v rail. I'm making the assumption (!), based on changes I've made to the connection to the MCLR pin while problem-solving, that the remaining minor instability relates to this pin, hence the original question re best practice for a reset circuit. Of course there may very well be other issues with it. I have in the past experienced a similar issue when I had a PIC reset pin pulled up with a 100k resistor and connected to a reset button via some longish wires; I discovered then that RFI/EMI generated by mains equipment nearby switching on/off caused the PIC to reset, and replaced the 100k with a much lower value.

The small isolated circuit exists on the same board and is tied to the common 0v via a 1Mohm resistor. The circuit is very simple - a DC-DC converter, resistor, optocoupler and a pair of wires that go to a connector mounted on the enclosure. Connecting these two wires together remotely via external equipment completes the circuit and provides a logic signal to the PIC via the opto. Since removing the 100nf decoupling capacitor on the MCLR, it does now take a significant static flash to reset the PIC so it's really no longer a major issue. I'm interested though in any clues as to how to make it as resilient as possible.

--
Steve H
Reply to
Steve H

The datasheet doesn't suggest this:

formatting link

Take a look at figure 14-5, recommended MCLR circuit.

I think it could be a problem, that the MCLR pin is used for HV programming, too, so maybe add an additional BAV99 before R2 to limit the voltage to about 0V..Vdd and place the reset components as close as possible to the MCLR pin.

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

That looks like a small target too then.

As the circuit previously suffered from latch-up (the increased current after a crash), some of the controller pins must have seen voltages well outside their permitted range.

As a rule, any wire that leaves or enters the circuit should be filtered, using e.g., RC low-pass sections, transformers or common- mode chokes, opto-couplers, feed-through capacitors, and/or clipping diodes. The choice depends on the kind of signal that you need to pass, of course.

Then there are a number of lay-out rules, valid for both PCB and cable dressing, that will minimize trouble:

First, keep inductive coupling small by systematically using a return wire with every 'hot' wire, and routing them along the same path. Minimize the open area between them by twisting them together, if you can. Use wide GND tracks, or a full GND plane, if you can. Also, keep circuits carrying large, fast changing currents well away from low-level circuitry. Static discharge is a fast changing current.

Then, minimize common-impedance coupling, don't share wires between different circuits, especially not if one is a low-level signal and the other is a large signal. Keep in mind that for fast changing currents, even a short piece of wire can have a sizable (inductive) impedance, which will therefore have a sizable voltage between its ends if the current rises fast enough. A useful rule of thumb for straight wire is ~10nH/cm.

Finally, minimize capacitive coupling by keeping conductors with rapidly changing voltages away from nodes with high impedances. You can also reduce the coupling by reducing the rate of change of agressor nodes, by reducing the impedance of victim nodes, or by putting grounded or guarded shields between them.

How far you need to go in all this, and what sins you can get away with, is a matter of judgment and experience.

Jeroen Belleman

Reply to
Jeroen Belleman

Ah yes, I was mistakenly looking at the 877 datasheet rather than the

877A, and the MCLR pin is a key difference, hence "Microchip recommends that the MCLR pin no longer be tied directly to Vdd". Clearly my circuit demonstrated what may happen if it is. Thanks for pointing me to the correct datasheet!
--
Steve H
Reply to
Steve H

In message , Jeroen Belleman writes

Thank for this. As noted in a previous post, I'd originally made an error by referring to the 877 datasheet rather than the 877A, with the correct datasheet suggesting that connecting MCLR directly to Vdd isn't a good idea. I intend to alter the arrangement I currently have to what the datasheet suggests and see if it improves, i.e. the decoupling capacitor refitted and a 1k between MCLR and the junction of the cap and

4k7 pull-up.

I've attempted with the board layout to have the ground track layout as well designed as I can make it, with respect to keeping current paths away from each other, together with nice wide tracks. I know from past experience it's easy to fall into a trap even so, with what may be considered an adequately wide track having enough inductance to block a transient current. I'll look over it again to see if I can see anything I've missed, and bear in mind your other suggestions.

--
Steve H
Reply to
Steve H

I've used that circuit as well.

How much better do you think it is to add a resistor, say 180R, between the junction of the two diodes and the CPU pin to further limit the drag on the input pin?

Reply to
Royston Vasey

I've been using TVS diodes since I experimented with one a few years ago.. I love them. They come in perfect sizes in the low voltage arena.

Reply to
Jamie

While this circuit will keep the input voltage between -0.7 V and +5.7 V _provided_ that the +5 V remains stable.

You may have to add a capacitance and a 5.5 V zener between the 5 V rail and ground close to this protection circuit.

Assuming +1 kV peak at input, the 1 kohm resistor will pass 1 A into the +5 V rail. Unless the 5 V load is greater than 1 A, the +5 V line potential will be elevated, possibly killing other chips on the +5 V line.

Reply to
Paul Keinanen

I'm not an expert for analog things, maybe Joerg knows it. But you could simulate it with LTspice.

--
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
Reply to
Frank Buss

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.