squeezing a field

Oct 23, 2024 Last reply: 1 year ago 41 Replies

You have been admonished by Sloman. Confess your errors and beg forgiveness.

Have you used LT Spice? It's easy to learn and is great fun. I(t makes time for snacking and napping too.

I even use it instead of a calculator for simple stuff like voltage dividers and RC time constants and things.

I can fiddle LC filters to at least third order. Sometimes 5th order, until things diverge and explode.

LT Spice schematics can be screen-shot for things like block diagram figures in manuals too.

There are more powerful tools out there. Audio doesn't necessarily need them, but John Larkin operates in a wider market, and there are tools he could use if he could be bothered to master them. His somewhat selective approach to the stuff he could have studied at Tulane might mean that he'd have to do quite a lot of work to master them.

I had to write my own multi-parameter non-linear least squares curve fitting program (in fortran 4) when I was an undergraduate. Since then I've used an off-the-shelf program when I need to do that kind of job.

But Williams and Taylor would let you do it better, if you could follow their advice.

There are other, better, schematic editors which you can also use that way.

My reply to that had anatomical connotations. :-)

I don't think they ever did a version that would run on a Mac G3 (OS

8.6), which is my main workhorse.

I’ve been running LTspice using Wine on Linux for 15 years or so, no problems. Wine runs fine on both x86 and apple silicon, I’m told.

Cheers

Phil Hobbs

A G3 won't run Linux or any of the OSX applications.

For 5%, I'd just use the ratio of difference and starting value to multiply the parallel mate.

My own manually tabulated book of tables for parallel values assumed an E48 or E96 (2 or 1%) rack of possibilities. Otherwise, why bother?

Took a while to complete, and only aimed at E24-type variations. Still around here somewhere, though the dime-store binding is fubar.

RL parts

<snip>

What's wrong with 'squegging' ? It's a simple word that covers a host of faults that all give the same approximate symptom . .

RL

Yeah. Linux will run on anything that will run Windows on Intel. Which modern Intel Macs will do. I have such a Mac, and run both MacOS and Windows on it. I bet that the new Apple silicon will run Windows in emulation as well.

Joe Gwinn

This machine is a G3 running Mac OS 8.6, it is not Intel-based and cannot run Windows or Linux or OSX.

You refer to his fat head of course.

Pity. Two wonderful parts of my life (after Mo of course) are LT Spice and my reverse Polish calculators.

Get a cheap used Windows laptop, $75 maybe, just to run LT Spice. And the Saturn PCB tools thing.

The G3 uses the IBM POWER PC chip.

Yes, I know.

I'm suggesting that it may be time for a small upgrade, say from the stone age to the bronze age. Don't want to rush headlong into anything, so stop before the iron age.

I also have a windows laptop bought specifically for lab stuff that MacOs will never do, not even from Win10 running on the iMac (which is too big to schlepp around my little lab anyway). Although I can run LTSpice on the iMac, I could run Spice on the lab laptop as well.

Joe Gwinn

The proximity of the aluminum is probably close to the effects of having ground plane or not below the inductor.

Steve Sandler has tested this:

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Found very little effect.

Similar test:

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They seem mostly concerned with EMI, which isn't a concern for me now. I just wanted to be sure that the inductor would work in the switching regulator, sandwiched close between a multilayer PCB and the aluminum baseplate.

My 48-to-5-volt switcher should be OK. The load current is low so I can use a lot of microhenries if needed. If I trust my AADE LC-meter, L drops roughly 20% when the inductor is squeezed between the conductive things.

The four half-bridge power switchers are more concerning. I think we'll try to make room for four giant shielded inductors on the parts side of that section... move other things to the bottom of the board.

Our policy is for PCB layer 2 to be a solid ground plane, and we very rarely chop holes in that.

With the advantage of 65 years of hindsight, it looks as if what he was seeing was gain in bipolar transistors running in the inverted mode.

"Squegging" was mostly used for weird oscillations in resonant circuits.

Class-D oscillators built with MOSFet switches don't squeg. Class-D oscillators built with bipolar transistors in LTSpice don't squeg either

- the Gummel-Poon transistor model doesn't model inverted mode behavior all that well.

Squegging in any oscillatory circuit, driven or otherwise, describes widely varying amplitudes that typically approach self-quenching and can otherwise approach unintentional overstess in the 'wobulating' cycle.

Not what the doctor ordered, or the designer anticipated.

Only blocking oscillators do it on purpose.

RL

What Baxandall was describing was a situation where you've built a class-D oscillator and used a feed inductor which has an appreciably higher inductance than the inverter transformer.

If you simulate that in LTSpice, the voltage at the centre tap starts off climbing up to about twice the steady-state peak and drops below the rail during recovery, but this roller-coaster effect dies away. In real life it doesn't (if you are using bipolar transistor for your switches).

My guess is that you could stop it by adding the right zener diode between the centre tap and ground - one that didn't ever conduct when the circuit was running smoothly, but would start conducting if the centre tap got much above the steady state peak. This stops the centre-tap ever getting below the rail at the bottom of the start-up roller coaster - or at least it does in LTSpice and would keep you away from the mode of operation where the switching transistors were operating in the inverted mode.

Peter Baxandall invented the circuit before 1959, before Zener diodes were widely available.

That topology is very critical around conduction overlap vs dead band and nano seconds matter.

If you drive the transistor bases with a centre tapped secondary (with many fewer turns) as Peter originally described, the nanoseconds look after themselves. Conduction overlap isn't a good idea but an handful of nanoseconds of underlap isn't a problem.

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