some questions about high precesion constant current source

Thanks all.

For me this task is a chanllege.I have done some experiment during past months. My goal is 1mA/100uA/10uA/1uA,the accuracy is 0.01%,the result is that the output can be switched between them.Then some mux-chips will bring error.

I have tried three ways.One,single op-amp & resistor.Second,two op-amps,one of them as the feedback.Third,the op-amp & PMOSFET.Before experiments,I simulated them by pspice.

The first two ways can acheive 1mA/100uA easily,but they can not realize 10uA/1uA. So I have to change the way to the third.But until now,I can not realize 1mA by the third way.Maybe because I am not familar with PMOSFET.

I will buy some chips tommorrow to do some experiments on your advice.I am sure I have to study more from all of you.

best regards.

You made it right, but there is a disadvantage with the reference hanging on the +12V rail and common mode on the opamp inputs. I propose you this circuit. You can fine tune R3 for infinite impedance and the left R2 for exact value. small caps(47p) across the feedback resistors will help stability. ___ .-------|___|---------------------------. Uref ___ | ___ R3 ___ ___ ___ | o-|___|--o--|___|--o--|___|--o--|___|--o--|___|--o--o R2 | R2 | R2 | R2 | R1 | o | |\\ | | |\\ | .-. | '--|-\\ | '--|-\\ | | | | | >---' | >---' Load| | | .--|+/ .--|+/ '-' | | |/ | |/ | === === R3=R2-R1 === Iload= Uref/R1 === GND GND GND GND (created by AACircuit v1.28 beta 10/06/04

I also don't like your transistor on the O/P to clamp overvoltage. It adds (variable) capacitance and a temperature dependent cutoff current. Use a comparator or something.

As well as the R+C already suggested by others I'd add a pulldown resistor on the output of the opamp, say 15k to -12v This biasses the o/p transistors away from the low gain (and sometimes oscillatory) crossover region.

Nah. First, there's nothing wrong with running MOSFETs in the subthreshold region - they work fine (it's the typical spice subthreshold MOSFET model that fails to work properly). Second, the transconductance/current ratio actually improves for MOSFETs in the subthreshold region, approaching BJTs in many cases, so that argument is wrong. Third, typical leakage for these small MOSFETs is in the low pA region, not 100s of nA, for Vds drain voltages below 80% of Vdss, which = 30 to 40V for these parts. Fourth, any Ids leakage current is part of the current-source output, measured by the servo, so contributes NO error anyway, unless the leakage exceeds the desired current. So 100nA would be fine in a 1uA current source.

All this said, I'd prefer to use a BJT over a MOSFET in this application, because its high gate capacitance slows circuit response at low currents. E.g., a VP0610L, BSS110 or BS250 has Ciss = 25pF typ, so f_T = Id / (2pi n Vt Ciss) = 50kHz at 1uA (assuming n = 4), which I'm guessing is perhaps 15 to 20x less than a small Darlington transistor like the MPSA64 or MPSA14 (50MHz at 500uA according to the datasheet curve). This means an active BJT current source can be compensated for faster operation than a MOSFET one. If that matters...

It would help if you posted the circuit in question on abse. Keep in mind that Vgs of a FET changes over temperature at a given current.. A 100 ohm resistor in series with the gate of a FET is to help prevent HF oscillations.

I have had good results with this circuit for low currents and it gives you the possibility not only to trimm the absolut value, but also for infinite impedance, which was what your circuit is suffering. The resistors are only of 2 values and they are commercially available in the required precision, why should a second opamp decrease precision? You have to study abit more before you can make these kind of remarks. sorry to say.

A 1mA pulldown (or pullup) simply takes the output transistors of the opamp out of Class-AB into Class-A. Done for the reasons already mentioned. No additional error mechanism is created.

At 1uA and with the VP06101 @ VDS=7V(ish), he is running the FET subthreshold, maybe nS transconductance, attempting to regulate complicated IDS leakage which is almost certainly 100's nA, low composite loop gain even with diFET at 100dB Aol, and regulation against power supply variation will not be very good.

Good thought. Perhaps drop the 12-0-12 and run it off a single 24v rail. All voltages are within most opamp's CMV and Vout ratings.

In article , Tony Williams wrote: [...]

Depending on the op-amp: I'd pull from the op-amp to the +12V not ground. You don't want noise from the power supply to be able to get near the VGS voltage of the power MOSFET.

In article , Winfield Hill wrote: [...]

How about switching to a device like the 3N163? Ciss is only about 2.5pF on them. The Cds is in about the same range. This would make for less frequency roll off problems. If you really want to go fast, you can AC boostrap the substrate on them.

Hi,Tony.

I think there is some difference between two ways.

In fact,we must differ -12v from ground in this circuit.

Today I found a strange thing,Vs=6.97V,Vg=6.35(the mosfet is VP0610l)

Why do you consider that to be strange? Was that for your 1uA or 10uA range? If you look at figure 3.14 in AoE, you'll see that MOSFET gate voltages are pretty low for < 1mA sub-threshold operation. An observed Vgs of 0.6V would be low, but not amazing.

OK.... wouldn't argue with that.

I don't believe that for a minute- this MOSFET is leaky as a sieve. They specify Vgs(th) at Id=1mA, which is much higher than most, the gate body leakage Igss is bounded by 10nA, and the Idss at Vds=25V is bounded by