SMPS inverter voltage feedback methods

Addendum, mostly for Jamie: "Balanced" or "synchronous" demodulator is in this sense just a glorified old-fashioned clamp circuit. Just like the one in a TV set where a correct DC black level must be gleaned from a source that cannot reliably transmit DC levels directly. Except that you don't have to fish the clamp pulse out of a noisy morass but it's already there.

IOW you clamp both sides to their respective grounds while the pulse is not present. When the pulse cometh then the source side is switched to the signal. Now you sample the value on the receiving end while the pulse is there and hold it until the next pulse. Or have a fast enough ADC log it during the pulse and stash the result. That's pretty much it.

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Regards, Joerg

http://www.analogconsultants.com/

Hi Joerg,

I cant quite picture it, would you care to cough up an ascii schematic? didnt unitrode make a chipset that did prettty much this?

Cheers Terry

The Unitrode UC1901 does something similar but not to the precision that my designs usually need:

Possibly this chip is heading for lalaland. Found it only at Arrow and IMHO outrageously expensive. Maybe because guys like me always roll their own ;-)

Can't draw in ASCII but in a nutshell it works like this:

The goal is to obtain an AM signal. A square wave, but a bit bandlimited so the Federales won't come after you. Its amplitude has to become proportional to the voltage to be measured on the isolated side.

One way to do that is to generate a clock, let's call it SENSECLK and transfer that over to the isolated side via XFMR1. On the iso side you use SENSECLK to switch a MUX such as a 74HC4051. SENSECLK low -> switch to ISOGND. SENSECLK high -> Switch to the voltage node to be measured. Might have to buffer first it it's a hi-Z node. Send the MUX output to a buffer amp and then to another iso transformer called XFMR2.

At the other end (the system side) you can restore the measured value with its DC component in many ways. The good news is that you have SENSECLK right there because it is generated on the system side. One method: Couple to XFMR2 with a small capacitor and connect the other end to a high input impedance amp. Pull that side to SYSGND whenever SENSECLK is low. Let go when SENSECLK is high. The output of that buffer gets a track-and-hold and will now track the signal that was measured on the isolated side. Including DC even though it has to be transported over via an iso transformer.

Hope this helps. At the end of the day those circuits look quite busy on a schematic but it's all mundane jelly-bean stuff, meaning it costs a lot less in production than all those fancy single-source chips. And you don't have to worry about parts obsolescence. I still remember that poor Burr-Brown sales rep 20 years ago. He wanted to sell me on a dielectrically isolated "super-duper iso amp". Nice product idea. I asked him what it costs. "Oh, these are a bargain, less than $75". When I told him that my discrete version was about five bucks including the transformers he walked away with a sad face.

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Regards, Joerg

http://www.analogconsultants.com/

yeah, thats the one I was thinking of.

gotcha. bung a clock over, scale it proportional to Vout, then feed it back & synchronously rectify it. the key of course is generating the clock on the primary side, which allows for synchronous detection. that beer must have addled my brain :) (I'm onto the chocolate milk now)

Right, back to my voltage-mode controller PFC thingy

Cheers Terry

[...] [....]

Here's what was rattling through my mind while I was thinking about how to do this.

ACFB+ ! ! ACFB- +-/\\/\\--+ ! ! ((((((( ======= ((((((( ! ! ! ! -- ! ---------+--/\\/\\/---- +Vout ! ! ! !/ \\! \\ !! ----------! !---- / Drive ---- !! ( !\\e e/! ! \\ ) !! ( ! ! ! ! ) !! ------------+-------+----- ! --+----------- -Vout ) !! ( ! GND ------ !! ( ! !! ---------------------------

This works even in the AC case if the resistors bring the voltage low enough that the EB junctions aren't breaking down while the transistors trade off conducting.

Hi,

I put this schematic into ltspice and it seems to kind of work, the AC voltage is being chopped by the Drive signal to Vout, but it is 90 degrees out of phase with the input AC signal, and also very low amplitude. Any ideas how to get the output phase to match the AC input?

Heres the circuit and waveform:

ltspice file:

cheers, Jamie

Hi Jamie,

Vout is the DC output voltage to be sensed.

V2 is the drive to the AM chopper transistors

where you have V1 is actually the output of the circuit - it is AC, at the same freqency as V2, but the amplitude is Vout*R2/(R2+R3) (roughly). What Joerg & MooseFET are talking about is then using V2 to synchronously demodulate this AC output - e.g. with a 4066, or Joergs suggestion which is even simpler.

Cheers Terry

Yes, that is it.

The CD4053 used like this in a decoder:

---/\\/\\-- ! ! AC in --+----/\\/\\--+--!-\\ ! ! ! >---+------ Decoded out --0 ---!+/ to filter

Ok I hooked it up right now I think, I am not sure if the waveforms are correct, it looks like it would be pretty hard to sample the voltages as the peaks are very fast.

V(n001) the green trace is the output voltage of L4 on the R1 side, and V(n003) is the voltage at the common node of R3 and R2 (the divided voltage from 120VAC.

So do these traces look correct for doing the "demodulation"? Also what about FM would that work too, or is this AM method the way to go?

here's the corrected circuit:

ltspice file:

cheers, Jamie

Ok I hooked it up right now I think, I am not sure if the waveforms are correct, it looks like it would be pretty hard to sample the voltages as the peaks are very fast.

V(n001) the green trace is the output voltage of L4 on the R1 side, and V(n003) is the voltage at the common node of R3 and R2 (the divided voltage from 120VAC.

So do these traces look correct for doing the "demodulation"? Also what about FM would that work too, or is this AM method the way to go?

here's the corrected circuit:

ltspice file:

cheers, Jamie

Dude, work on your reading comprehension - its a little rusty. Your V1 should be THE DC VOLTAGE YOU WANT TO MEASURE. RE-READ THAT SENTENCE.

then probe across winding L4

circuit:

file:

V2 should be a square wave.

The L4, L5, L6 transformer should end up with a near squarewave on it That is V2 times the voltage from V1

The L4, L5, L6 transformer may need a load resistance on the L4 section. A small capacitor may also be needed to kill the spikes.

circuit:

file:

Checked V2, it is a squarewave, gives similar results whether it is AC or DC squarewave current.

Here are the L4, L5 and L6 waveforms:

The overall circuit:

I changed the V1 source to DC and got the same output spikes in L4 as when it is AC.

cheers, Jamie

circuit:

file:

circuit:

Those currents look not too far from right. Carefully recheck stuff including the dots on the inductors. Try dropping the K value of the coupling to perhaps 0.25 to see that the inductors work right when they are not coupled.

circuit:

file:

circuit:

I checked the coupling, and changed the L5 and L6 coil winding (dots) to have both dots on the centertap, and the primary current looks better now, (no spikes) but the secondary is still just current spikes on the rising and falling edges of the primary pulses.

If I change the winding of the L2/L3 coils to be opposite winds (dots together towards the centertap), then the L5/L6 currents are in phase, otherwise they are out of phase, either way the L4 secondary is still current spikes on the rising and falling edges of the L5/L6 primary pulses, but the L4 waveform looks more balanced when all coils have dots towards the centertaps :)

I probably just need to add the demodulation circuitry to the L4 secondary to translate the spikes back into the voltages?

cheers, Jamie

circuit:

file:

circuit:

here's the waveforms and circuit:

schematic:

ltspice file:

output L4 current:

L5 and L6 currents (in phase and no spikes now):

cheers, Jamie

schematic?

circuit:

file:

circuit:

Both transformers should look like this:

0 )))))) ============== ))))) )))) 0 0

Note where the dots are

schematic?

circuit:

file:

circuit:

hmm, the two primary coils are 180 degrees out of phase, with nice looking waveforms but the secondary has just a few fA and pV on it now! :)

cheers, Jamie

circuit:

file:

circuit:

operator error.

to think of it another way: its a very low power push-pull converter. being very low power, you can feed the center-tap of the "primary" via a voltage divider. if you get no secondary voltage, your sim is wrong.

to start with, throw away L1 - L3, and just drive ideal switches with a complementary square wave. all L1-L3 does is allow the non-isolated primary to provide the drive signals to the isolated voltage sampling circuit (Qn, L4-L6). this is only necessary so you can then easily synchronously rectify the output of L4.

personally, I like to use ideal components in my sims, to get the basic concepts up and running. once you have proved the concept, *then* toss in FETs/bipolars/leakage inductance etc. until you become an expert at your particular sim package, this is a good approach.

Cheers Terry